What is claimed is:
1. A method of manufacturing a display device comprising:
forming a semiconductor film over a substrate;
crystallizing the semiconductor film by a heat treatment;
etching the crystallized semiconductor film into semiconductor layers;
doping a first impurity element into the semiconductor layers;
forming a mask over a portion of the semiconductor layers;
doping a second impurity element into at least one of the semiconductor layers over which the mask is not formed; and
performing a rapid thermal annealing to the semiconductor layers after the second doping step.
2. A method of manufacturing a display device according to claim 1, wherein the substrate comprises a glass substrate.
3. A method of manufacturing a display device according to claim 1, wherein the mask comprises a photoresist.
4. A method of manufacturing a display device according to claim 1, wherein the first impurity element comprises phosphorus, and the second impurity element comprises boron.
5. A method of manufacturing a display device according to claim 1, wherein a does amount of the second impurity element is larger than that of the first impurity element.
6. A method of manufacturing a display device according to claim 1, wherein the rapid thermal annealing is conducted by irradiating the semiconductor layers with an infrared light.
7. A method of manufacturing a display device according to claim 1, wherein the rapid thermal annealing is conducted for several seconds to several minutes.
8. A method of manufacturing a display device according to claim 1, wherein the display device is a liquid crystal display device.
9. A method of manufacturing a display device comprising:
forming a semiconductor film over a substrate;
crystallizing the semiconductor film by a heat treatment;
etching the crystallized semiconductor film into semiconductor layers;
forming a gate insulating film on the semiconductor layers by decomposing TEOS;
doping a first impurity element into the semiconductor layers;
forming a mask over a portion of the semiconductor layers; and
doping a second impurity element into at least one of the semiconductor layers over which the mask is not formed.
10. A method of manufacturing a display device according to claim 9, wherein the substrate comprises a glass substrate.
11. A method of manufacturing a display device according to claim 9, wherein the mask comprises a photoresist.
12. A method of manufacturing a display device according to claim 9, wherein the first impurity element comprises phosphorus, and the second impurity element comprises boron.
13. A method of manufacturing a display device according to claim 9, wherein a does amount of the second impurity element is larger than that of the first impurity element.
14. A method of manufacturing a display device according to claim 9, wherein the gate insulating film is formed by plasma CVD.
15. A method of manufacturing a display device according to claim 9, wherein the display device is a liquid crystal display device.
16. A method of manufacturing a display device comprising:
forming a semiconductor film over a substrate;
crystallizing the semiconductor film by a heat treatment;
etching the crystallized semiconductor film into semiconductor layers;
forming a gate insulating film on the semiconductor layers by decomposing TEOS; and
performing a rapid thermal annealing to the semiconductor layers after forming the gate insulating film.
17. A method of manufacturing a display device according to claim 16, wherein the substrate comprises a glass substrate.
18. A method of manufacturing a display device according to claim 16, wherein the rapid thermal annealing is conducted by irradiating the semiconductor layers with an infrared light.
19. A method of manufacturing a display device according to claim 16, wherein the rapid thermal annealing is conducted for several seconds to several minutes.
20. A method of manufacturing a display device according to claim 16, wherein the gate insulating film is formed by plasma CVD.
21. A method of manufacturing a display device according to claim 16, wherein the display device is a liquid crystal display device.
22. A method of manufacturing a display device comprising:
forming a semiconductor film over a substrate;
crystallizing the semiconductor film by a heat treatment;
etching the crystallized semiconductor film into semiconductor layers;
forming a gate insulating film on the semiconductor layers by decomposing TEOS; and
irradiating the semiconductor layers with a laser light after forming the gate insulating film.
23. A method of manufacturing a display device according to claim 22, wherein the substrate comprises a glass substrate.
24. A method of manufacturing a display device according to claim 22, wherein the laser comprises an excimer laser.
25. A method of manufacturing a display device according to claim 22, wherein the gate insulating film is formed by plasma CVD.
26. A method of manufacturing a display device according to claim 22, wherein the display device is a liquid crystal display device.
27. A method of manufacturing a display device comprising:
forming a semiconductor film over a substrate;
irradiating the semiconductor film with a laser light to crystallize the semiconductor film;
etching the crystallized semiconductor film into semiconductor layers;
doping a first impurity element into the semiconductor layers;
forming a mask over a portion of the semiconductor layers;
doping a second impurity element into at least one of the semiconductor layers over which the mask is not formed; and
performing a rapid thermal annealing to the semiconductor layers after the second doping step.
28. A method of manufacturing a display device according to claim 27, wherein the substrate comprises a glass substrate.
29. A method of manufacturing a display device according to claim 27, wherein the mask comprises a photoresist.
30. A method of manufacturing a display device according to claim 27, wherein the first impurity element comprises phosphorus, and the second impurity element comprises boron.
31. A method of manufacturing a display device according to claim 27, wherein a does amount of the second impurity element is larger than that of the first impurity element.
32. A method of manufacturing a display device according to claim 27, wherein the rapid thermal annealing is conducted by irradiating the semiconductor layers with an infrared light.
33. A method of manufacturing a display device according to claim 27, wherein the rapid thermal annealing is conducted for several seconds to several minutes.
34. A method of manufacturing a display device according to claim 27, wherein the laser comprises an excimer laser.
35. A method of manufacturing a display device according to claim 27, wherein the display device is a liquid crystal display device.
36. A method of manufacturing a display device comprising:
forming a semiconductor film over a substrate;
irradiating the semiconductor film with a laser light to crystallize the semiconductor film;
etching the crystallized semiconductor film into semiconductor layers;
forming a gate insulating film on the semiconductor layers by decomposing TEOS;
doping a first impurity element into the semiconductor layers;
forming a mask over a portion of the semiconductor layers; and
doping a second impurity element into at least one of the semiconductor layers over which the mask is not formed.
37. A method of manufacturing a display device according to claim 36, wherein the substrate comprises a glass substrate.
38. A method of manufacturing a display device according to claim 36, wherein the mask comprises a photoresist.
39. A method of manufacturing a display device according to claim 36, wherein the first impurity element comprises phosphorus, and the second impurity element comprises boron.
40. A method of manufacturing a display device according to claim 36, wherein a does amount of the second impurity element is larger than that of the first impurity element.
41. A method of manufacturing a display device according to claim 36, wherein the laser comprises an excimer laser.
42. A method of manufacturing a display device according to claim 36, wherein the gate insulating film is formed by plasma CVD.
43. A method of manufacturing a display device according to claim 36, wherein the display device is a liquid crystal display device.
44. A method of manufacturing a display device comprising:
forming a semiconductor film over a substrate;
irradiating the semiconductor film with a laser light to crystallize the semiconductor film;
etching the crystallized semiconductor film into semiconductor layers;
forming a gate insulating film on the semiconductor layers by decomposing TEOS; and
performing a rapid thermal annealing to the semiconductor layers after forming the gate insulating film.
45. A method of manufacturing a display device according to claim 44, wherein the substrate comprises a glass substrate.
46. A method of manufacturing a display device according to claim 44, wherein the rapid thermal annealing is conducted by irradiating the semiconductor layers with an infrared light.
47. A method of manufacturing a display device according to claim 44, wherein the rapid thermal annealing is conducted for several seconds to several minutes.
48. A method of manufacturing a display device according to claim 44, wherein the laser comprises an excimer laser.
49. A method of manufacturing a display device according to claim 44, wherein the gate insulating film is formed by plasma CVD.
50. A method of manufacturing a display device according to claim 44, wherein the display device is a liquid crystal display device.
51. A method of manufacturing a display device comprising:
forming a semiconductor film over a substrate;
irradiating the semiconductor film with a laser light to crystallize the semiconductor film;
etching the crystallized semiconductor film into semiconductor layers;
forming a gate insulating film on the semiconductor layers by decomposing TEOS; and
irradiating the semiconductor layers with a laser light after forming the gate insulating film.
52. A method of manufacturing a display device according to claim 51, wherein the substrate comprises a glass substrate.
53. A method of manufacturing a display device according to claim 51, wherein the laser comprises an excimer laser.
54. A method of manufacturing a display device according to claim 51, wherein the gate insulating film is formed by plasma CVD.
55. A method of manufacturing a display device according to claim 51, wherein the display device is a liquid crystal display device.
The claims below are in addition to those above.
All refrences to claims which appear below refer to the numbering after this setence.
1. A pixel structure, formed on a substrate and electrically connected with a scan line and a data line, the pixel structure comprising:
a semiconductor pattern, comprising:
at least two channel areas, located below the scan line, each of the two channel areas is a region of the semiconductor pattern overlapping with the scan line, and the two channel areas having different aspect ratios;
at least one doping area, connected between the channel areas;
a source area and a drain area; and
a pixel electrode, electrically connected with the drain area, wherein the source area is connected between the data line and one of the two channel areas, and the drain area is connected between the pixel electrode and the other of the two channel areas,
wherein the scan line overlapping with different channel areas has two different widths including a first width and a second width, a length of one of the channel areas is substantially equal to the first width, and a length of the other one of the channel areas is substantially equal to the second width.
2. The pixel structure according to claim 1, wherein the scan line comprises a branch substantially perpendicular to the scan line.
3. The pixel structure according to claim 2, wherein one of the two channel areas is located below and overlapped with the branch, and the length of the channel area below the branch is substantially equal to a width of the branch.
4. The pixel structure according to claim 1, wherein the semiconductor pattern comprises a polysilicon pattern.
5. The pixel structure according to claim 4, wherein the semiconductor pattern further comprises a capacitor electrode electrically connected with the drain area and the pixel electrode, and located below the pixel electrode.
6. The pixel structure according to claim 5, further comprising a common electrode disposed between the capacitor electrode and the pixel electrode.
7. The pixel structure according to claim 1, wherein the doping area is in an L shape or a U shape.
8. The pixel structure according to claim 1, wherein a part of the scan line above the channel area, the source area, and the drain area form a polysilicon thin film transistor (TFT).
9. A pixel structure, formed on a substrate and electrically connected with a scan line and a data line, the pixel structure comprising:
a semiconductor pattern, comprising:
at least two channel areas, located below the scan line, each of the two channel areas is a region of the semiconductor pattern overlapping with the scan line, and the two channel areas having different aspect ratios;
at least one doping area, connected between the channel areas;
a source area and a drain area; and
a pixel electrode, electrically connected with the drain area, wherein the source area is connected between the data line and one of the two channel areas, and the drain area is connected between the pixel electrode and the other of the two channel areas,
wherein the scan line overlapping with different channel areas has two different widths including a first width and a second width, the first width and the second width are substantially perpendicular to an extension direction of the scan line, a length of one of the channel areas is substantially equal to the first width, and a length of the other one of the channel areas is substantially equal to the second width.
10. The pixel structure according to claim 9, wherein the scan line comprises a branch substantially perpendicular to the scan line.
11. The pixel structure according to claim 10, wherein one of the two channel areas is located below and overlapped with the branch, and the length of the channel area below the branch is substantially equal to a width of the branch.
12. The pixel structure according to claim 9, wherein the semiconductor pattern comprises a polysilicon pattern.
13. The pixel structure according to claim 12, wherein the semiconductor pattern further comprises a capacitor electrode electrically connected with the drain area and the pixel electrode, and located below the pixel electrode.
14. The pixel structure according to claim 13, further comprising a common electrode disposed between the capacitor electrode and the pixel electrode.
15. The pixel structure according to claim 9, wherein the doping area is in an L shape or a U shape.
16. The pixel structure according to claim 9, wherein a part of the scan line above the channel area, the source area, and the drain area form a polysilicon thin film transistor (TFT).