1. A solid-state imaging device comprising:
a first semiconductor substrate having a pixel part and a peripheral circuit part, the pixel part including a photoelectric conversion element and a first transistor for transferring a charge of the photoelectric conversion element, and the peripheral circuit part including a circuit element of a first circuit;
a second semiconductor substrate having a second transistor of a second circuit;
a wiring structure arranged between the first semiconductor substrate and the second semiconductor substrate; and
a pad configured to connect the solid-state imaging device to an external terminal; wherein the second semiconductor substrate has a protection circuit connected to the pad and to the second circuit, and
wherein the pad is connected to the protection circuit via the wiring structure, and a semiconductor region of the second transistor and a semiconductor region of the protection circuit are disposed in the second semiconductor substrate.
2. The solid-state imaging device according to claim 1, wherein the protection circuit is a protection diode circuit.
3. The solid-state imaging device according to claim 1, wherein a plurality of pads and protection circuits are arranged.
4. The solid-state imaging device according to claim 1, wherein the protection circuit has at least two diodes.
5. The solid-state imaging device according to claim 1, wherein the protection circuit has at least one diode and one resistor.
6. The solid-state imaging device according to claim 1, wherein the protection circuit is surrounded by an element separation structure.
7. The solid-state imaging device according to claim 1, wherein the protection circuit is arranged inwardly with respect to the pad in planar direction.
8. The solid-state imaging device according to claim 1, wherein the pad is arranged to overlap the protection circuit in planar direction.
9. A solid-state imaging device comprising:
a first semiconductor substrate having a pixel part and a peripheral circuit part, the pixel part including a photoelectric conversion element and a first transistor for transferring a charge of the photoelectric conversion element, and the peripheral circuit part including a circuit element of a first circuit;
a second semiconductor substrate having a second transistor of a second circuit;
a wiring structure arranged between the first semiconductor substrate and the second semiconductor substrate; and
a pad configured to connect the solid-state imaging device to an external terminal;
wherein the second semiconductor substrate has a protection circuit connected to the pad and to the second circuit,
wherein the wiring structure includes a plurality of wiring layers, and
wherein the pad is arranged in a layer that is identical with one wiring layer of the plurality of wiring layers, the one wiring layer being arranged between the first semiconductor substrate and the second semiconductor substrate.
10. The solid-state imaging device according to claim 9, wherein a main component of the one wiring layer is the same as the main component of the pad, and wherein the plurality of wiring layers includes another wiring layer whose main component is copper.
11. The solid-state imaging device according to claim 9, wherein the main component of the pad is aluminum.
12. The solid-state imaging device according to claim 1, wherein the second semiconductor substrate has an amplification transistor for outputting a signal based on the charge of the photoelectric conversion element.
13. An imaging system comprising:
a solid-state imaging device as claimed in claim 1; and
a processing unit configured to process a signal output from the solid-state imaging device.
14. The solid-state imaging device according to claim 9, wherein the plurality of wiring layers include a wiring layer arranged closer to the first semiconductor substrate than the one wiring layer, and a wiring layer arranged closer to the second semiconductor substrate than the one wiring layer.
15. The solid-state imaging device according to claim 1, wherein the first semiconductor substrate has a scanning circuit.
16. The solid-state imaging device according to claim 9, wherein the first transistor is arranged on a main face of the first semiconductor substrate, and a diode which forms the protection circuit is arranged on a main face of the second semiconductor substrate.
17. The solid-state imaging device according to claim 1, wherein the second semiconductor substrate is thicker than the first semiconductor substrate.
18. The solid-state imaging device according to claim 15, wherein the second semiconductor substrate has a scanning circuit.
19. A solid-state imaging device comprising:
a first semiconductor substrate having a pixel part and a peripheral circuit part, the pixel part including a photoelectric conversion element and a first transistor for transferring a charge of the photoelectric conversion element, and the peripheral circuit part including a circuit element of a first circuit;
a second semiconductor substrate having a second transistor of a second circuit;
a wiring structure arranged between the first semiconductor substrate and the second semiconductor substrate; and
a pad configured to connect the solid-state imaging device to an external terminal;
wherein the second semiconductor substrate has a protection circuit connected to the pad and to the second circuit, and
wherein an opening, through which the external terminal is connected to the pad, is arranged in the second semiconductor substrate, and is not arranged in the first semiconductor substrate.
20. An imaging system comprising:
a solid-state imaging device as claimed in claim 9; and
a processing unit configured to process a signal output from the solid-state imaging device.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A wearable display system comprising:
a wearable display to be worn by a person;
a display buffer to receive display data from a graphics engine, which data includes data regarding position of a wearer in a virtual environment;
a display processor unit to process vision direction data using the display data from the graphics engine, wherein the display processor unit sends the display data to the wearable display.
2. The system of claim 1, wherein the wearable display includes a left display and a right display, wherein the wearable display is to be worn by a wearer with the right display in field of view a right eye of wearer and the left display in field of view a left eye of wearer.
3. The system of claim 1, wherein the display buffer includes at least a first sub-buffer and a second sub-buffer for the left display and at least a third sub-buffer and a fourth sub-buffer for the right display.
4. The system of claim 3, wherein the first sub-buffer is to provide display data to the left display and release the second sub-buffer to be updated at a first time, and wherein the second sub-buffer is to provide display data to the left display and release the first sub-buffer to be updated at a second time.
5. The system of claim 4, wherein the display processor unit is to control a change from the first time to the second time using a movement signal from a direction tracking unit.
6. The system of claim 1, wherein the display processor unit includes a direction tracker with a direction tracking rate, and wherein a display data rate provides data from the display buffer to the display and is about equal to or greater than the direction tracking rate.
7. The system of claim 6, wherein the display includes a data rate that is about equal to the direction tracking rate.
8. The system of claim 6, wherein the display includes a data rate that greater than the direction tracking rate.
9. The system of claim 6, wherein the direction tracking unit is to track direction in three or greater axis.
10. The system of claim 6, wherein the display processor unit operates at at least 600 HZ, and wherein the display buffer receives data from a graphics engine at less than or 120 HZ.
11. A gaming system comprising:
a gaming computing device;
a graphics processing unit to provide location of a user in a virtual gaming environment; and
a wearable display unit operably connected to the gaming computing device and being wearable by the user, the display unit including:
a wearable display to be worn by a person;
a vision direction tracking unit to detect the direction of vision by the person;
a display buffer to receive display data from the graphics processing unit, which display data includes data regarding position of the user in the virtual gaming environment; and
a display processor to process vision direction data using the display data from the graphics processing unit, wherein the display processor sends the display data to the wearable display.
12. The gaming system of claim 11, wherein the wearable display includes a left display and a right display, wherein the wearable display is to be worn by a user with the right display in field of view a right eye of user and the left display in field of view a left eye of user.
13. The gaming system of claim 11, wherein the display buffer includes at least a first sub-buffer and a second sub-buffer for the left display and at least a third sub-buffer and a fourth sub-buffer for the right display.
14. The gaming system of claim 13, wherein the first sub-buffer is to provide display data to the left display and release the second sub-buffer to be updated at a first time, and wherein the second sub-buffer is to provide display data to the left display and release the first sub-buffer to be updated at a second time.
15. The gaming system of claim 14, wherein the display processor is to control a change from the first time to the second time using a movement signal from the vision direction tracking unit.
16. The gaming system of claim 11, wherein the display processor includes a display data rate that provides data from the display buffer to the display, and wherein the display data rate is about equal to or greater than the direction tracking rate.
17. The gaming system of claim 16, wherein the display includes a refresh rate that is about equal to the direction tracking rate.
18. The gaming system of claim 16, wherein the display includes a refresh rate that greater than the direction tracking rate.
19. The gaming system of claim 16, wherein the direction tracking unit is to track direction in three or greater axis.
20. The gaming system of claim 16, wherein the display processor unit operates at at least 600 HZ, and wherein the display buffer receives data from a graphics engine at less than or 120 HZ.
21. The gaming system of claim 11, wherein the gaming computing device is to provide gaming data that is placed into the virtual environment by the graphics processing unit.
22. The gaming system of claim 11, wherein the graphics processing unit includes an input separate from the wearable display unit to control a position of the user in the virtual environment.
23. The gaming system of claim 11, wherein the vision direction tracking unit tracks movement of the user’s eyes.
24. The gaming system of claim 23, wherein the vision direction tracking unit tracks movement of the user’s head on which the wearable display unit may be worn.
25. The gaming system of claim 24, wherein wearable display unit includes an accelerometer that is to detect the position and the movement of the user’s head with when the wearable display unit is worn by a user.