1. A method for the quantitative determination of an impurity present in a peptide product composition, comprising the steps:
(a) providing a peptide product composition comprising a peptide product and an unknown amount of at least one impurity, wherein said impurity cannot be separated from the peptide product or another ingredient of the composition by a chromatographic procedure,
(b) providing at least one sample of the peptide product composition without said impurity added and optionally at least one further sample of the peptide product composition with a known amount of said impurity added,
(c) quantitatively determining said impurity in said sample from step (b) by mass spectrometry, and
(d) calculating the amount of said impurity in the peptide product composition based on the results of (c).
2. The method according to claim 1 wherein step (b) comprises providing at least three samples of the peptide product composition, wherein a first sample comprises the peptide product composition without said impurity added, and wherein at least two further samples comprise the peptide product composition each with a different known amount of said impurity added.
3. The method of claim 1, wherein the peptide product has a length of from 5-100 amino acids.
4. The method of claim 1, wherein the peptide product has been chemically synthesized, particularly by a solid phase synthesis procedure, or produced by recombinant DNA processes.
5. The method of claim 1, wherein the peptide product composition is a pharmaceutical formulation or a composition intended for the manufacture of a pharmaceutical formulation.
6. The method of claim 1, wherein the peptide product is an exendin peptide, particularly Lixisenatide (AVE0010).
7. The method of claim 1, wherein the impurity is a peptide impurity.
8. The method of claim 1, wherein the impurity cannot be quantitatively separated from the peptide product or from another ingredient of the composition by an HPLC procedure, particularly by a Reverse Phase HPLC procedure.
9. The method of claim 1, wherein the peptide product comprises unknown amounts of at least 2 impurities which cannot be quantitatively separated from the peptide product or from another ingredient of the composition by a chromatographic procedure.
10. The method of claim 1, wherein the impurity is added to at least one peptide product composition sample from a stock preparation, preferably from at least two stock preparations comprising different concentrations of the impurity.
11. The method of claim 1, wherein at least 3 or 4 further samples with different known amounts added impurity are provided and subjected to mass spectrometry determination.
12. The method of claim 1, wherein the mass spectrometry is high resolution mass spectrometry.
13. The method of claim 1, wherein the calculation comprises a linear regression analysis.
14. The method of claim 13, wherein the calculation is carried out according to the equation:
y=ax+b
wherein a=slope
y=determined peak area of the impurity in a sample
x=added amount of the impurity in a sample
b=intercept
and the unknown amount of the impurity xt is obtained as follows:
xt=b\xb7a\u22121
15. The method of claim 12, wherein said high resolution mass spectrometry comprises Fourier Transform mass spectrometry.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A solid-state imaging device including a lamination-type backside illumination CMOS (Complementary Metal Oxide Semiconductor) image sensor having a global shutter function, the solid-state imaging device comprising
a separation film including one of a light blocking film and a light absorbing film between a memory and a photo diode.
2. The solid-state imaging device according to claim 1, further comprising a vertical transistor configured to transfer charge from the photo diode to the memory.
3. The solid-state imaging device according to claim 2, further comprising a floating diffusion, wherein
the vertical transistor is disposed at an end of the photo diode such that a pitch of the photo diode coincides with a pitch of the vertical transistor, the memory, and the floating diffusion.
4. The solid-state imaging device according to claim 2, further comprising a floating diffusion, wherein
the vertical transistor is disposed at the center of the photo diode such that a pitch of the photo diode coincides with a pitch of the vertical transistor, the memory, and the floating diffusion.
5. The solid-state imaging device according to claim 1, further comprising a floating diffusion, wherein
the photo diode, the memory, and the floating diffusion are provided on respective layers and laminated on one another, to form a three-layer structure.
6. The solid-state imaging device according to claim 1, wherein
the separation film including the light blocking film is formed of metal.
7. The solid-state imaging device according to claim 6, wherein
a negative potential is applied to the separation film including the light blocking film and being formed of metal.
8. The solid-state imaging device according to claim 6, wherein
the separation film including the light blocking film and being formed of metal is connected to an outside of a pixel array.
9. The solid-state imaging device according to claim 1, wherein
the separation film including the light absorbing film includes a film formed of a compound semiconductor having a chalcopyrite structure.
10. An electronic apparatus including a solid-state imaging device including a lamination-type backside illumination CMOS (Complementary Metal Oxide Semiconductor) image sensor having a global shutter function, the electronic apparatus comprising
a separation film including one of a light blocking film and a light absorbing film between a memory and a photo diode.
11. A method of manufacturing a solid-state imaging device including a lamination-type backside illumination CMOS (Complementary Metal Oxide Semiconductor) image sensor having a global shutter function, the solid-state imaging device including a separation film including one of a light blocking film and a light absorbing film between a memory and a photo diode, the method comprising:
a first step of forming an insulating film on one surface of a first substrate on which the memory is formed and an insulating film on one surface of a second substrate on which the photo diode is formed, and forming the separation film on the insulating film of the first substrate and the separation film on the insulating film of the second substrate;
a second step of bonding the first substrate and the second substrate to each other, with the surface of the first substrate on which the separation film is formed and the surface of the second substrate on which the separation film is formed facing each other, to form an integrated substrate; and
a third step of thinning the integrated substrate.
12. The method of manufacturing a solid-state imaging device according to claim 11, wherein
the first step includes forming an SCF (Si cover film) on each of the one surface of the first substrate and the one surface of the second substrate before the insulating films are formed.
13. The method of manufacturing a solid-state imaging device according to claim 12, further comprising
a fourth step of forming the photo diode on a surface that is different from the surface of the second substrate on which the insulating film is formed, after the insulating films and the separation films are formed in the first step and before the second step is performed.
14. The method of manufacturing a solid-state imaging device according to claim 12, further comprising
a fourth step of forming the photo diode on a surface that is different from the surface of the second substrate on which the insulating film is formed, after the third step is performed.
15. A solid-state imaging device manufactured by a method of manufacturing a solid-state imaging device including a lamination-type backside illumination CMOS (Complementary Metal Oxide Semiconductor) image sensor having a global shutter function, the solid-state imaging device including a separation film including one of a light blocking film and a light absorbing film between a memory and a photo diode, the method comprising:
a first step of forming an insulating film on one surface of a first substrate on which the memory is formed and an insulating film on one surface of a second substrate on which the photo diode is formed, and forming the separation film on the insulating film of the first substrate and the separation film on the insulating film of the second substrate;
a second step of bonding the first substrate and the second substrate to each other, with the surface of the first substrate on which the separation film is formed and the surface of the second substrate on which the separation film is formed facing each other, to form an integrated substrate; and
a third step of thinning the integrated substrate.