1. A gain controllable wide-band low noise amplifier comprising:
a first transistor, coupled to an input node and an output node, amplifying an input signal to generate an output signal;
a second transistor allowing the output signal to feedback to the input node; and
a control circuit complementarily controlling transconductance of the first and second transistors,
wherein the control circuit comprises:
a main control portion having an output connected to the input node and controlling the amount of current flowing through the first transistor in response to a digital control signal; and
a feedback control portion complementarily controlling the amount of current flowing through the second transistor with respect to the amount of current flowing through the first transistor in response to an inverse of the digital control signal.
2. The low noise amplifier of claim 1, further comprising a third transistor electrically connected to the second transistor and the feedback control portion.
3. The low noise amplifier of claim 2, wherein tie main control portion comprises:
a first current source supplying a predetermined magnitude of a first reference current;
a first current mirror circuit generating a first bias current proportional to the magnitude of the first reference current in response to a complementary signal of the control signal; and
a second current mirror circuit electrically connected to the first transistor in a current mirror form and allowing the amount of current flowing through the first transistor to be proportional to the magnitude of the first bias current.
4. The low noise amplifier of claim 3, wherein the feedback control portion comprises:
a second current source supplying a predetermined magnitude of a second reference current;
a third current mirror circuit generating a second bias current proportional to the amount of the second reference current in response to the control signal; and
a fourth current mirror circuit electrically connected to the third transistor in the current mirror form and allowing the amount of current flowing through the second transistor to be proportional to the magnitude of the second bias current.
5. The low noise amplifier of claim 2, further comprising a fourth transistor disposed between the first transistor and the output node.
6. The low noise amplifier of claim 1, further comprising an output load provided between the output node and a power voltage node, the output load including a resistance device and an inductance device electrically connected in series.
7. A gain controllable wide-band low noise amplifier comprising:
an amplification portion including a first transistor connected to first node for amplifying an input signal to generate an output signal at an output node;
a feedback portion including a second transistor connected between a predetermined node and the output node and allowing the output signal to feedback to an input node;
a control circuit connected to the first node for complementarily controlling the amount of current flowing through the amplification portion and the amount of current flowing through the feedback portion; and
a third transistor connected to the control circuit and the predetermined node for controlling a current flowing through the second transistor.
8. The low noise amplifier of claim 7, wherein the first transistor of the amplification portion comprises an amplification transistor coupled to the input node and an output node, wherein the second transistor of the feedback portion comprises a feedback transistor coupled to the output node and the input node, and wherein the control circuit controls the amount of current flowing through the amplification transistor and the amount of current flowing through the feedback transistor to be inversely proportional to each other.
9. The low noise amplifier of claim 7, wherein the first transistor of the amplification portion comprises an amplification transistor pair coupled to the input node and an output node, wherein the second transistor of the feedback portion comprises a feedback transistor pair coupled to the output node and the input node, and wherein the control circuit controls the amount of current flowing through the amplification transistor pair and the amount of current flowing through the feedback transistor pair to be inversely proportional to each other.
10. The low noise amplifier of claim 7, wherein the main control portion comprises:
a first current source supplying a predetermined magnitude of a first reference current;
a first current mirror circuit generating a first bias current proportional to the magnitude of the first reference current in response to the control signal; and
a second current mirror circuit controlling the amount of current flowing through the amplification transistor to be proportional to the magnitude of the first bias current, and
the feedback control portion comprises:
a second current source supplying a predetermined magnitude of a second reference current;
a third current mirror circuit generating a second bias current proportional to the magnitude of the second reference current in response to the control signal; and
a fourth current mirror circuit controlling the magnitude of current flowing through the feedback transistor to be proportional to the magnitude of the second bias current.
11. The low noise amplifier of claim 9, further comprising a fourth transistor disposed between the amplification transistor and the output node.
12. The low noise amplifier of claim 9, further comprising a fourth transistor pair disposed between the amplification transistor pair and the output node.
13. A wide-band wireless communication receiver comprising:
a low noise amplifier amplifying an input signal;
a mixer down-converting a frequency of an output signal of the low noise amplifier;
an AD converter converting an output signal of the mixer to a digital signal; and
a digital signal processor restoring original data from the digital signal,
wherein the low noise amplifier includes:
an amplification portion amplifying an input signal to generate an output signal;
a feedback portion allowing the output signal to feedback to an input node; and
a control circuit complementarily controlling the magnitude of current flowing through the amplification portion and the magnitude of current flowing through the feedback portion,
wherein the control circuit comprises:
a main control portion having an output connected to the input node and controlling the amount of current flowing through a first transistor of the amplification portion in response to a digital control signal; and
a feedback control portion complementarily controlling the amount of current flowing through a second transistor of the feedback portion with respect to the amount of current flowing through the first transistor in response to an inverse of the digital control signal.
14. The wide-band wireless communication receiver of claim 13, wherein the digital control signal is output from the digital signal processor.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A process for reducing or suppressing the appearance of watermarks in a hydrophobic surface of a semiconductor substrate prepared as a base substrate for epitaxial growth, which process comprises:
cleaning the hydrophobic surface of the semiconductor substrate with an aqueous solution containing hydrofluoric acid (HF) and an additional acid having a pKa of less than 3, wherein the additional acid is present in the solution at a concentration by weight that is less than that of the HF; and
final rinsing the cleaned hydrophobic surface of the semiconductor substrate with deionised water while subjecting the hydrophobic surface of the semiconductor substrate to megasonic waves for a time sufficient to reduce or suppress watermarks that could otherwise occur on the hydrophobic surface if the megasonic waves were not applied.
2. The process of claim 1, which further comprises conducting an additional rinsing with deionised water without the application of megasonic waves immediately after the cleaning and prior to the final rinsing.
3. The process of claim 1, which further comprises drying the substrate after the final rinsing.
4. The process of claim 1, wherein the megasonic waves are applied at a power in the range of at least 100 Watts and at most 1200 Watts, at a frequency of at least 1 kHz and at most 10 MHz and for a time in the range of at least 1 second and at most 5 minutes.
5. The process of claim 1, wherein the megasonic waves are applied at a power in the range of at least 800 Watts and at most 1000 Watts, at a frequency in the range of at least 700 kHz and at most 1 MHz, and for a time in the range of at least 10 seconds and at most 60 seconds.
6. The process of claim 1, wherein HF is present in the solution at a concentration in the range of 0.05% <HF by weight<49%.
7. The process of claim 1, wherein HF is present in the solution at a concentration in the range of 0.5% <HF by weight<10%.
8. The process of claim 1, wherein the additional acid has a pKa of less than 0 and the cleaning removes surface oxides and provides a hydrophobic surface for epitaxial growth.
9. The process of claim 8, wherein the additional acid is selected from the group consisting of hydrochloric acid (HCl), nitric acid (HNO3), sulphuric acid (H2SO4) and perchloric acid (HClO4).
10. The process of claim 8, wherein the additional acid is hydrochloric acid (HCl) and is present at a concentration in the range of 0.01% <HCl by weight<38%.
11. The process of claim 8, wherein the additional acid is hydrochloric acid (HCl) and is present at a concentration in the range of 0.01% <HCl by weight<5%.
12. The process of claim 1, wherein the hydrophobic surface is of the substrate is provided by a layer of silicon, strained silicon or silicon-germanium.
13. The process of claim 1, wherein the hydrophobic surface is of the substrate is provided by a layer of silicon-germanium.
14. The process of claim 1, wherein the cleaning is carried out in a single wafer cleaning device and is directly followed by the final rinsing.
15. The process of claim 1, which further comprises carrying out epitaxial growth on the cleaned and prepared hydrophobic surface of the semiconductor substrate.
16. The process of claim 15, wherein the hydrophobic surface of the substrate is provided by a layer of silicon-germanium (SiGe) layer or a strained silicon (sSi) layer.
17. The process of claim 15, wherein the hydrophobic surface of the substrate is provided by a layer of silicon-germanium (SiGe) layer having a germanium concentration of at least 20%, expressed as a percentage of Ge atoms with respect to Si atoms, at the surface of the substrate.
18. The process of claim 15, wherein the epitaxial growth comprises growth of a strained silicon (sSi) layer or a silicon-germanium (SiGe) layer on the hydrophobic surface of the semiconductor substrate.
19. A process for reducing or suppressing the appearance of watermarks in a hydrophobic surface of a semiconductor substrate prepared as a base substrate for epitaxial growth, which process comprises:
cleaning the hydrophobic surface of the semiconductor substrate with an aqueous solution containing hydrofluoric acid (HF) and hydrochloric acid (HCl), wherein the HF is present in the solution at a concentration in the range of 0.5% <HF by weight<49% and the HCl is present at a concentration in the range of 0.01% <HCl by weight<38% with the HCl present in the solution at a concentration by weight that is less than that of the HF; and
final rinsing the cleaned hydrophobic surface of the semiconductor substrate with deionised water while subjecting the hydrophobic surface of the semiconductor substrate to megasonic waves for a time sufficient to reduce or suppress watermarks that could otherwise occur on the hydrophobic surface if the megasonic waves were not applied;
wherein the megasonic waves are applied at a power in the range of at least 100 Watts and at most 1200 Watts, at a frequency of at least 1 kHz and at most 10 MHz and for a time in the range of at least 1 second and at most 5 minutes.
20. The process of claim 19 wherein the HF is present in the solution at a concentration in the range of 0.5% <HF by weight<10% and the HCl is present at a concentration in the range of 0.01% <HCl by weight<5%, and wherein the megasonic waves are applied at a power in the range of at least 800 Watts and at most 1000 Watts, at a frequency in the range of at least 700 kHz and at most 1 MHz, and for a time in the range of at least 10 seconds and at most 60 seconds.