1. A packaging machine comprising:
a moulding station having at least one heating surface with a plurality of heater elements per heating surface; and
a controller configured to individually control the heater elements in order to bring different regions of a film to different temperature levels;
wherein the heater elements are formed as thick-film heater elements.
2. A packaging machine according to claim 1 wherein the at least one heating surface is configured as a heating plate, a stamp andor surfaces of a moulding cavity.
3. A packaging machine according to claim 1 wherein the heater elements are integrated into a common heating plate or heating mat.
4. A packaging machine according to claim 1 wherein that at least one heating surface comprises two mutually facing heating surfaces, and wherein the heater elements arranged on one heating surface are mirrored with the heater elements on the other heating surface.
5. A packaging machine according to claim 1 wherein the at least one heating surface comprises a plurality of heating surfaces that can be heated independently of one another.
6. A packaging machine according to claim 1 wherein the moulding station is configured to perform a moulding process on the film, and wherein the at least one heating surface is coolable during the moulding process.
7. A packaging machine according to claim 1 wherein the packaging machine is implemented as a deep-draw packaging machine with an intermittent operational cycle.
8. A packaging machine according to claim 1 wherein the film is a plastic film.
9. A method for an intermittently operating a deep-draw packaging machine with a moulding station, the method comprising:
feeding a film into the moulding station, wherein the moulding station comprises at least one heating surface with a plurality of heater elements formed as thick-film heater elements, wherein the heater elements are controllable individually by a controller in order to heat the film to different temperature levels;
closing the moulding station to create a tightly closed chamber;
controlling the heater elements with the controller for a spatially inhomogeneous temperature distribution in the film;
positioning the film on the heater elements;
switching off the heater elements after reaching the different temperature levels in the film;
deforming the film in a mould tool part of the moulding station;
cooling the film in a stable and no longer plastically deformable temperature range;
opening the moulding station; and
removing the deformed film from the moulding station.
10. A method according to claim 9 wherein the at least one heating surface comprises at least two mutually facing heating surfaces on which the heater elements are in each case mirrored with respect to one another, wherein in each case two mutually facing heater elements are operated together on the oppositely situated heating surfaces.
11. A method according to 9 wherein the at least one heating surface comprises a plurality of heating surfaces, of which at a point in time only one is heated at least progressively.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method of mapping the strain in a crystalline sample, comprising:
scanning in at least one direction to form a high angle annular dark field scanning transmission electron microscope (HAADF-STEM) image of said crystalline sample including at least two regions with different strain where a Fourier transform defractogram of said HAADF-STEM image includes (111) Bragg reflections;
selecting two independent Bragg reflections in said Fourier transform defractogram;
performing geometric phase analysis (GPA) with said two said independent Bragg reflections; and
forming a strain map of said sample for at least one term in a two dimensional strain tensor.
2. The method of claim 1 where said sample has an area between about 50 nm by 50 nm and about 300 nm by 300 nm and a thickness between about 50 nm and about 250 nm.
3. The method of claim 1 where said sample has an area of about 250 nm by 250 nm and a thickness of about 200 nm.
4. The method of claim 1 where said sample is a semiconductor device and where said HAADF-STEM image includes more than one portion of said semiconductor device.
5. The method of claim 4 where said sample is a MOS transistor and said HAADF-STEM image includes at least a portion of a source, drain, channel, and substrate of said MOS transistor.
6. The method of claim 4 where said sample is a bipolar transistor and said HAADF-STEM image includes at least a portion of an emitter, a base, a collector, and a substrate of said bipolar transistor.
7. The method of claim 1 where strain maps for horizontal strain related terms, \u2208xx and \u2208x, in said two dimensional strain tensor are formed from HAADF-STEM images formed by scanning in a horizontal, x-direction and said strain maps for vertical strain related terms, \u2208yy and \u2208xy, terms in said two dimensional strain tensor are formed from HAADF-STEM images formed by scanning in a vertical, y-direction.
8. A method of mapping the strain in a crystalline sample, comprising:
forming a high angle annular dark field scanning transmission electron microscope (HAADF-STEM) image of said crystalline sample including at least two regions with different strain where a Fourier transform defractogram of said image includes (111) Bragg reflections by scanning in at least one scan direction;
selecting two independent Bragg reflections in said Fourier transform defractogram;
performing geometric phase analysis (GPA) with said two said independent Bragg reflections; and
forming a strain map of the sample for at least one term in a two dimensional strain tensor that is related to the strain in said scan direction.
9. The method of claim 8 where said scan direction is a horizontal, x-direction and where said term in said two dimensional strain tensor is at least one of horizontal related terms in said stress tensor, \u2208xx and \u2208yx.
10. The method of claim 8 where said scan direction is a vertical, y-direction and where said term in said two dimensional strain tensor is at least one of vertical related terms in said stress tensor, \u2208yy and \u2208xy.
11. The method of claim 8 where said crystalline sample is a MOS transistor and where said two regions include a channel region and at least one of a source, drain, and substrate region.
12. The method of claim 8 where said crystalline sample is a bipolar transistor and where said two regions include a base region and at least one of a emitter, collector, and substrate region.
13. A method of mapping each of the components of the strain tensor in a semiconductor device, comprising:
forming a first high angle annular dark field scanning transmission electron microscope (HAADF-STEM) image of said semiconductor device including at least two regions with different strain where a first Fourier transform defractogram of said first image includes (111) Bragg reflections by scanning in a horizontal direction;
selecting first and second independent Bragg reflections from said Fourier transform defractogram;
performing a first geometric phase analysis (GPA) with said first and second independent Bragg reflections; and
forming a first and second strain map for two components of said strain tensor related to horizontal strain;
forming a second HAADF-STEM image of said semiconductor device including said two regions with different strain where a second Fourier transform defractogram of said second HAADF-STEM image includes (111) Bragg reflections by scanning in a vertical direction;
selecting third and fourth independent Bragg reflections from said second Fourier transform defractogram;
performing a second GPA with said third and fourth independent Bragg reflections; and
forming third and fourth strain maps for two components of said strain tensor related to vertical strain.
14. The method of claim 13 where said semiconductor device is a MOS transistor and where said two regions include a channel region and at least one of a source, drain, and substrate region.
15. The method of claim 13 where said semiconductor device is a bipolar transistor and where said two regions include a base region and at least one of a emitter, collector, and substrate region.