1. A mobile station comprising:
a controller to determine a first base station for transmitting data and to determine a second different base station for receiving data; and
a transceiver to transmit data to the first base station while associated with the second base station, the transceiver is operable to receive data from the second base station while associated with the first base station.
2. The mobile station of claim 1, further comprising selection logic to select the first base station if the first base station is closer to the mobile station than the second base station is.
3. The mobile station of claim 1, further comprising selection logic to select the first base station based at least on distances of each base station to the mobile station.
4. The mobile station of claim 1, further comprising selection logic to select the first base station based at least on transmission power required for transmitting data.
5. The mobile station of claim 1, further comprising selection logic to determine a downlink cell boundary based on
a first value indicative of capacity of a first downlink from the first base station to the transceiver;
a second value indicative of capacity of a second downlink from the second base station to the transceiver; and
a third value indicative of capacity of a backhaul link from a third base station to the first base station, wherein the first base station is a relay station.
6. The mobile station of claim 5, wherein an inverse of the first value is equal to a sum of an inverse of the second value and an inverse of the third value, if the third base station is the second base station.
7. The mobile station of claim 5, wherein the selection logic determines the downlink cell boundary further based on
a first average number of mobile stations associated with downlinks from the first base station; and
a second average number of mobile stations associated with downlinks from the second base station.
8. The mobile station of claim 1, further comprising selection logic to determine an uplink cell boundary based on
a first value indicative of capacity of a first uplink from the mobile station to the first base station;
a second value indicative of capacity of a second uplink from the mobile station to the second base station; and
a third value indicative of capacity of a backhaul link from the first base station to a third base station, wherein the first base station is a relay station.
9. A method comprising:
selecting, based on a SINR measure, a first base station among a first plurality of base stations for receiving data;
selecting, based on a transmit power measure, a second base station among the first plurality of base stations for transmitting data;
associating with the first base station;
associating with the second base station; and
transmitting data to the second base station while associated with the first base station.
10. The method of claim 9, wherein the SINR measure includes maximum SINR values, each maximum SINR value is associated with one of the plurality of base stations.
11. The method of claim 9, wherein the transmit power measure includes values of maximum transmit power values, each maximum transmit power value is associated with one of the plurality of base stations.
12. A base station comprising:
a controller to manage an uplink transmission from a mobile station; and
a transceiver to receive data from the mobile station, wherein the transceiver does not establish data channel to the mobile station to transmit contents data to the mobile station.
13. The base station of claim 12, further comprising logic to determine an average number of mobile stations associated with uplinks to the base station.
14. The base station of claim 12, wherein the controller is operable to transmit only network control data to the mobile station via a second link with a lower bandwidth than the uplink transmission.
15. The base station of claim 12, wherein the controller is operable to transmit network control data with respect to the uplink transmission to the mobile station by relaying the network control data via the second base station.
16. A method comprising:
determining a first base station to transmit data over an uplink channel based on a first criterion;
determining a second base station to receive data over a downlink channel based on a second criterion that is different from the first criterion;
transmitting data to the first base station over the uplink channel; and
receiving data from the second base station over the downlink channel.
17. The method of claim 16, wherein the first criterion includes distances of each base station to the network adapter.
18. The method of claim 16, further comprising selecting the first base station based on data indicative of capacities and loads associated with channels, wherein the channels includes a backbone channel to a third base station if either the first or the second base station is a relay station.
19. The method of claim 16, further comprising determining a dual base stations (APs) zone in which the first base station and the second base station are used for the uplink channel and the downlink channel respectively.
20. The method of claim 16, further comprising
establishing a first link, with a lower bandwidth than the uplink channel, to receive only first network control data from the first base station; and
establishing a second link, with a lower bandwidth than the downlink channel, to transmit only second network control data to the second base station.
21. The method of claim 16, wherein network control data with respect to the uplink channel are relayed via the downlink channel from the second base station.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method comprising the steps of:
a) depositing a layer comprising germanium onto a substrate of a semiconductor wafer;
b) heating the semiconductor wafer in an oxygen atmosphere at a temperature above 500 degrees centigrade wherein the germanium in the layer is converted into water-soluble germanium dioxide; and
c) removing the layer by placing the semiconductor wafer in water.
2. The method of claim 1 wherein the step of heating the semiconductor wafer in an oxygen atmosphere comprises the step of heating the semiconductor wafer in an oxygen atmosphere at a temperature range of between 500 and 700 degrees centigrade.
3. The method of claim 2 wherein the step of heating the semiconductor wafer in an oxygen atmosphere comprises the step of heating the semiconductor wafer in a plasma comprising oxygen at a temperature range of between 500 and 600 degrees centigrade.
4. The method of claim 1 wherein the step of depositing a layer comprising germanium onto a semiconductor wafer comprises the step of depositing germanium through chemical vapor deposition.
5. The method of claim 1 wherein the step of depositing a layer comprising germanium onto a semiconductor wafer comprises the step of depositing SixGe(1x) through chemical vapor deposition under conditions wherein x is less than or equal to 0.3.
6. The method of claim 1 further comprising the steps of:
d) forming a gate oxide over the substrate;
e) depositing and patterning at least one gate layer to create a gate, the patterning creating two exposed substrate regions on opposing sides of the gate; and
f) patterning the layer comprising germanium to form sidewall spacers on sidewalls of the gate.
7. A method for making a transistor on a substrate of a semiconductor wafer, the method comprising the steps of:
a) forming a gate oxide over the substrate;
b) forming at least one gate layer over the gate oxide;
c) patterning the at least one gate layer and the gate oxide to create a gate, the patterning creating two exposed substrate regions on opposing sides of the gate;
d) forming and patterning a conforming layer to form decomposable sidewall spacers on sidewalls of the gate;
e) implanting exposed portions of the semiconductor wafer with a dopant of a first type to implant sourcedrain regions in the substrate;
f) heating the substrate sufficiently to anneal and activate the dopant to further form the sourcedrain regions;
g) removing the decomposable sidewall spacers;
h) forming a second conforming layer over the gate and sourcedrain regions;
i) doping the second conforming layer with a dopant of the first type;
j) heating the substrate at a temperature high enough to cause diffusion of the dopant of the first type from the conforming layer and into underlying layers, thereby creating extensions in the sourcedrain regions; and
k) removing at least a portion of the second conforming layer to expose at least the sourcedrain regions.
8. The method of claim 7 wherein the step of forming a second conforming layer over the gate and sourcedrain regions comprises the step of forming the second conforming layer to a thickness of between 50 and 200 nanometers.
9. The method of claim 7 wherein the step of doping the second conforming layer with a dopant of the first type comprises the step of implanting the second conforming layer with a dopant of the first type having an energy, wherein a higher dopant energy is chosen with a thicker second conforming layer and a lower dopant energy is chosen with a thinner second conforming layer, the step of implanting performed wherein the dopant impinges a surface of the semiconductor at angles ranging between 45 and 60 degrees.
10. The method of claim 7 wherein the step of doping the second conforming layer with a dopant of the first type comprises the step of performing in situ doping of the second conforming layer.
11. The method of claim 7 wherein the step of removing at least a portion of the second conforming layer to expose at least the sourcedrain regions comprises the step of patterning the second conforming layer to form sidewall spacers on the sidewalls of the gate and to expose the sourcedrain regions.
12. The method of claim 11 wherein the second conforming layer comprises silicon dioxide and wherein the step of forming a second conforming layer over the gate and sourcedrain regions comprises the step of depositing through chemical vapor deposition silicon dioxide over the gate and sourcedrain regions.
13. The method of claim 7 wherein the step of forming and patterning a conforming layer to form decomposable sidewall spacers on sidewalls of the gate comprises the step of depositing the conformal layer comprising germanium.
14. The method of claim 13 wherein the germanium is deposited through chemical vapor deposition.
15. The method of claim 13 wherein the step of removing the decomposable sidewall spacers comprises the steps of:
I) heating the substrate in an oxygen atmosphere at a temperature above 500 degrees centigrade wherein the germanium in the decomposable sidewall spacers is converted into water-soluble germanium dioxide; and
II) removing the decomposable sidewall spacers by placing the substrate in water.
16. The method of claim 15 wherein the oxygen atmosphere is a plasma comprising oxygen and the temperature above 500 degrees centigrade is a temperature between 500 and 600 degrees centigrade.
17. The method of claim 7 wherein the step of forming and patterning a conforming layer to form decomposable sidewall spacers on sidewalls of the gate comprises the step of depositing a conformal layer that comprises SixGe(1x), wherein x is less than or equal to 0.3.
18. The method of claim 17 wherein the SixGe(1x) is deposited through chemical vapor deposition and under conditions wherein x is less than or equal to 0.3.
19. The method of claim 17 wherein the step of removing the decomposable sidewall spacers comprises the steps of:
I) heating the substrate in an oxygen atmosphere at a temperature above 500 degrees centigrade wherein the germanium in the decomposable sidewall spacers is converted into water-soluble germanium dioxide; and
II) removing the decomposable sidewall spacers by placing the substrate in water.
20. The method of claim 7 wherein the step of forming and patterning a conforming layer to form decomposable sidewall spacers on sidewalls of the gate comprises the step of depositing a conformal layer that comprises germanium dioxide or SixGe(1x), wherein x is less than or equal to 0.3.
21. The method of claim 20 wherein the step of removing the decomposable sidewall spacers comprises the step of removing the decomposable sidewall spacers by placing the substrate in water.
22. The method of claim 20 wherein the step of forming and patterning a conforming layer to form decomposable sidewall spacers on sidewalls of the gate comprises the steps of:
I) depositing germanium dioxide or SixGe(1x), wherein x is less than or equal to 0.3, through chemical vapor deposition; and
II) anisotropically etching the conforming layer.
23. The method of claim 20 wherein:
the method further comprises, after the step of forming and patterning a conforming layer to form decomposable sidewall spacers on sidewalls of the gate, the steps of:
I) forming a protective layer over the gate and its two exposed substrate regions on opposing sides of the gate; and
II) forming and patterning a photoresist layer on the substrate that exposes the gate and its two exposed substrate regions on opposing sides of the gate; and
the step of implanting exposed portions of the semiconductor wafer with a dopant of a first type to implant sourcedrain regions in the substrate further comprises the steps of:
I) removing the photoresist layer; and
II) removing the protective layer.
24. The method of claim 23 wherein the protective layer is selected from the group consisting essentially of anti-reflective coating, silicon dioxide, silicon oxynitride, or Parylene.
25. The method of claim 7 wherein the second conforming layer comprises germanium dioxide or SixGe(1x), wherein x is less than or equal to 0.3.
26. The method of claim 25 wherein the step of removing at least a portion of the second conforming layer to expose at least the sourcedrain regions comprises the step of removing the second conforming layer by placing the substrate in water.
27. The method of claim 25 wherein:
the method further comprises, after the step of forming a second conforming layer over the gate and sourcedrain regions, the steps of:
I) forming a protective layer over the portion of the second conforming layer that covers gate and its two exposed substrate regions on opposing sides of the gate; and
II) forming and patterning a photoresist layer on the substrate that exposes the portion of the second conforming layer that covers the gate and its two exposed substrate regions on opposing sides of the gate; and
the step of implanting the second conforming layer with a dopant of the first type further comprises the steps of:
I) removing the photoresist layer; and
II) removing the protective layer.
28. The method of claim 27 wherein the protective layer is selected from the group consisting essentially of anti-reflective coating, silicon dioxide, silicon oxynitride, or parylene.
29. The method of claim 7 wherein the step of forming a second conforming layer over the gate and sourcedrain regions comprises the step of depositing a second conformal layer that comprises germanium.
30. The method of claim 29 wherein the germanium is deposited through chemical vapor deposition.
31. The method of claim 29 wherein the step of removing at least a portion of the second conforming layer to expose at least the sourcedrain regions comprises the steps of:
I) heating the substrate in an oxygen atmosphere at a temperature above 500 degrees centigrade wherein the germanium in the second conformal layer is converted into water-soluble germanium dioxide; and
II) removing the germanium dioxide and the second conformal layer by placing the substrate in water.
32. The method of claim 31 wherein the oxygen atmosphere is a plasma comprising oxygen and the temperature above 500 degrees centigrade is a temperature between 500 and 600 degrees centigrade.
33. The method of claim 31 further comprising the steps of:
l) forming a third conforming layer of silicon dioxide over the gate and sourcedrain regions; and
m) anisotropically patterning the third conforming layer to form sidewall spacers on sidewalls of the gate.
34. A method for making a transistor of a first type and a transistor of a second type on a substrate of a semiconductor wafer, the method comprising the steps of:
a) forming a gate oxide over the substrate;
b) forming at least one gate layer over the gate oxide;
c) patterning the at least one gate layer and the gate oxide to create a first and a second gate, the patterning creating two exposed substrate regions on opposing sides of each gate;
d) forming and patterning a conforming layer to form decomposable sidewall spacers on sidewalls of the gates;
e) forming and patterning a first photoresist layer to expose the first gate and its associated exposed substrate regions while covering the second gate and its associated exposed substrate regions;
f) implanting exposed portions of the semiconductor wafer with a dopant of a first type to implant first sourcedrain regions in the substrate;
g) removing the first photoresist layer;
h) forming and patterning a second photoresist layer to expose the second gate and its associated exposed substrate regions while covering the first gate and the first sourcedrain regions;
i) implanting exposed portions of the semiconductor wafer with a dopant of a second type to implant second sourcedrain regions in the substrate;
i) removing the second photoresist layer;
j) heating the substrate sufficiently to anneal and activate the first and second type dopants to further form the first and second sourcedrain regions;
k) removing the decomposable sidewall spacers;
l) forming a second conforming layer over the gates and sourcedrain regions;
m) forming and patterning a third photoresist layer to expose the second conforming layer covering the first gate and the first sourcedrain regions while the third photoresist layer covers the second conforming layer covering the second gate and the second sourcedrain regions;
n) doping the second conforming layer with a dopant of the first type;
o) removing the third photoresist layer;
p) forming and patterning a fourth photoresist layer to expose the second conforming layer covering the second gate and the second sourcedrain regions while the third photoresist layer covers the second conforming layer covering the first gate and the first sourcedrain regions;
q) doping the second conforming layer with a dopant of the second type;
r) removing the fourth photoresist layer;
s) heating the substrate at a temperature high enough to cause diffusion of the dopant of the first and second types from the conforming layer and into underlying layers, thereby creating extensions in the first and second sourcedrain regions; and
t) removing at least a portion of the second conforming layer to expose at least the first and second sourcedrain regions.
35. The method of claim 34 further comprising:
u) after the step of removing the third photoresist layer, performing the step of heating the substrate at a temperature high enough to cause diffusion of the dopant of the first type from the conforming layer and into underlying layers, thereby creating a partial extension in the first sourcedrain region.
36. The method of claim 34 wherein:
the method further comprises, after the step of forming and patterning a conforming layer to form decomposable sidewall spacers on opposing sides of each gate, the step of forming a protective layer over the gate and substrate; and
the step of removing the second photoresist layer further comprises the step of removing the protective layer.
37. The method of claim 36 wherein the protective layer is selected from the group consisting essentially of anti-reflective coating, silicon dioxide, silicon oxynitride, or Parylene.
38. The method of claim 34 wherein:
the method further comprises, after the step of forming a second conforming layer over the gates and sourcedrain regions, the step of forming a protective layer over the gate, sourcedrain regions, and substrate; and
the step of removing the fourth photoresist layer further comprises the step of removing the protective layer.
39. The method of claim 38 wherein the protective layer is selected from the group consisting essentially of anti-reflective coating, silicon dioxide, silicon oxynitride, or Parylene.