1460754163-7e647988-d66e-424a-a0e9-5f8ba90c1b25

1. A field effect transistor (FET) structure, comprising:
a deep n-type well in a substrate;
a shallow n-type well within the deep n-type well;
a p-type well within the deep n-type well and
a stepped shallow trench isolation (STI) region at least partially within the shallow n-type well, the stepped STI region including:
a first lower surface positioned within the shallow n-type well,
a second lower surface contacting and overlying the p-type well, wherein a depth of the second lower surface as measured from an upper surface of the stepped STI region is less than a depth of the first lower surface as measured from the upper surface of the stepped STI region, and
a transition surface positioned between the first lower surface and the second lower surface, wherein the transition surface contacts at least one of the shallow n-type well, the deep n-type well, and the p-type well.
2. The FET structure of claim 1, wherein the stepped STI region includes silicon oxide.
3. The FET structure of claim 1, further comprising a polysilicon layer contacting and overlying the stepped STI region.
4. The FET structure of claim 1, wherein the transition surface of the stepped STI region includes a rounded surface profile.
5. The FET structure of claim 4, wherein the rounded surface profile of the stepped STI region is positioned between a gate dielectric material section, the gate dielectric material being positioned above an upper surface of the shallow n-type well, and an STI section positioned below a lower surface of the shallow n-type well.
6. The FET structure of claim 4, wherein the rounded surface profile of the transition surface is proximal to the second lower surface of the stepped STI region.
7. The FET structure of claim 1, wherein the second lower surface of the stepped STI region is substantially coplanar with an upper surface of one of the deep n-type well and the p-type well.
8. The FET structure of claim 1, wherein the transition surface of the stepped STI region includes a first section and a second section, and wherein an angular orientation of the first section relative to a lower surface of the shallow n-type well is different from an angular orientation of the second section relative to the lower surface of the shallow n-type well.
9. The FET structure of claim 1, wherein the FET structure comprises a high-voltage complementary metal oxide semiconductor (HVCMOS) FET structure.
10. A field effect transistor (FET) structure, comprising:
a deep n-type well in a substrate;
a shallow n-type well within the deep n-type well; and
a stepped shallow trench isolation (STI) region within the shallow n-type well, the stepped STI region including:
a plurality of first sections within the shallow n-type well, each of the plurality of first sections being laterally separated from each other by a respective portion of the shallow n-type well, wherein at least one of the plurality of first sections includes a lower surface contacting and overlying the deep n-type well, and
a second section within the shallow n-type well and contacting each of the plurality of first sections, wherein the second section overlies and extends laterally beyond each of the plurality of first sections.
11. The FET structure of claim 10, wherein the second section of the stepped STI region includes a zero-level mask material.
12. The FET structure of claim 10, wherein a lateral width of the second section is greater than a combined lateral width of the plurality of first sections.
13. The FET structure of claim 10, wherein the second section of the stepped STI region includes a portion contacting and overlying the shallow n-type well.
14. The FET structure of claim 10, wherein the second section of the stepped STI region includes a portion extending laterally beyond each of the first sections within the shallow n-type well.
15. The FET structure of claim 10, further comprising:
an electrical contact overlying and contacting the stepped STI region; and
a polysilicon gate contacting and overlying the electrical contact.
16. The FET structure of claim 15, further comprising:
a p-type well within the deep n-type well, wherein the contact layer contacts and overlies each of the stepped STI region, the shallow n-type well, and the p-type well.
17. A field effect transistor (FET) structure, comprising:
a deep n-type well in a substrate;
a shallow n-type well within the deep n-type well; and
a multi-layer shallow trench isolation (STI) region within the shallow n-type well and deep n-type well, the multi-layer STI region including:
a first section positioned within the shallow n-type well and the deep n-type well, wherein a lower surface of the first section is buried within the deep n-type well and an upper surface of the first section is buried within the shallow n-type well, and
a second section contacting and overlying the first section, wherein the second section comprises an STI material having a different composition from the first section, an upper surface of the first section is substantially coplanar with an upper surface of the shallow n-type well, and wherein a depth between the upper and lower surfaces of the first section is substantially equal to a depth between an upper surface of the shallow n-type well and a lower surface of the second section.
18. The FET structure of claim 17, wherein a lateral width of the first section is approximately equal to a lateral width of the second section, and wherein the first section is substantially vertically aligned with the second section.
19. The FET structure of claim 17, wherein the first section includes a zero-level mask material.
20. The FET structure of claim 17, further comprising:
a p-type well within the deep n-type well;
an electrical contact overlying and contacting the multi-layer STI region; and
a p-type well within the deep n-type well, wherein the electrical contact overlies each of the multi-layer STI region, the shallow n-type well, and the p-type well.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A multi-ply tissue comprising:
a first cellulosic embossed ply having an emboss pattern applied over from three to twelve percent of its surface to a depth of at least about thirty thousandths of an inch; and
a second cellulosic embossed ply of tissue, the depth of emboss applied to said second ply being no more than about 80% of the depth of emboss applied to said first ply;
said first ply being contact laminated to said second ply, the primary adhesion between the plies of tissue being the result of contact between cellulosic fibers rather than through an intermediate adhesive, the first and second plies contacting one another in contact areas, the contact areas between said first and second plies defining compliant voids, the total contact area being no more than about fifteen percent of the area of the tissue sheets.
2. The multi-ply tissue according to claim 1, wherein the contact areas between the first ply and the second ply are elongated contact areas.
3. The multi-ply tissue according to claim 1, wherein the contact areas between the first ply and the second ply are rounded.
4. The multi-ply tissue according to claim 1, wherein the emboss patterns on the first and second plies are formed by emboss elements possessing an aspect ratio greater than 1.
5. The multi-ply tissue according to claim 1, wherein the emboss pattern on the first and second plies are formed by emboss elements possessing an aspect ratio greater than 5.
6. A method of forming a two ply tissue comprising:
producing a first ply of tissue having an emboss pattern;
producing a second ply of tissue having an emboss pattern, the first ply being more heavily embossed than the second ply;
resting the first and second plies together to contact laminate the first ply to the second ply with contact areas between the first and second plies, the contact areas being elongated or gently rounded.
7. The process according to claim 6, wherein the emboss patterns on the first ply and the second ply are formed by emboss elements having an aspect ratio greater than one.
8. The process according to claim 6, wherein the emboss patterns on the first ply and the second ply are formed by emboss elements having an aspect ratio greater than 5.
9. The process according to claim 6, including preconditioning the first ply and the second ply before embossing through use of heat and moisture.
10. The process according to claim 6, including preconditioning the first ply and the second ply before embossing through use of steam.
11-20. (canceled)
21. A method of producing an embossed tissue comprising:
conveying a base sheet through a nip between a first impression roll made of rubber and a pattern roll to push portions of the base sheet into indented portions of the pattern roll;
conveying the base sheet through a nip between the pattern roll and a second impression roll made of rubber having a lower hardness than the rubber from which the first impression roll is made to push the portions of the base sheet further into the indented portions of the pattern roll to produce an embossed tissue.
22. The method according to claim 21, including conveying the base sheet between the first impression roll and another impression roll prior to conveying the base sheet through the nip between the first impression roll and the pattern roll.
23. A method of forming a two-ply tissue comprising:
conveying a base sheet through a nip between an impression roll and a pattern roll to emboss a pattern on the base sheet, the engagement of the impression roll with the pattern roll producing an embossed base sheet having a back side possessing projections produced by the pattern roll; and
apply a flat backing sheet to the back side of the embossed base sheet by contact lamination to cause the backing sheet to adhere to the back side of the embossed base sheet and thereby form a two-ply tissue.
24. The method according to claim 23, wherein the base sheet and the backing sheet are conveyed at different speeds.
25. The method according to claim 23, wherein the projections on the embossed base sheet include projections with differing heights.