1460754623-8a18b666-45c7-4840-9bd5-23e638cade91

1. An idle-state detection circuit for detecting an idle state of a processor, comprising:
an iterative-operation detection section configured to detect that the processor repeats every predetermined number of clocks an operation to load data satisfying a preset idle-state condition from a particular address; and
a decision section configured to compare a number of iterations detected by the iterative-operation detection section with a preset specified number of loops, and to determine that the processor is in an idle state if the number of iterations is greater than the specified number of loops.
2. The idle-state detection circuit of claim 1, wherein
the iterative-operation detection section includes
a match-of-address detection section configured to detect that an address referred to by the processor matches the particular address,
a satisfaction-of-condition detection section configured to detect that data loaded by the processor satisfies the idle-state condition, and
a loop detection section configured to detect that the detection operations by the match-of-address detection section and the satisfaction-of-condition detection section are repeated every predetermined number of clocks.
3. The idle-state detection circuit of claim 1, wherein
the idle-state condition is to match data loaded by the processor in a previous load operation by the processor.
4. The idle-state detection circuit of claim 1, wherein
the idle-state condition is to be greater than a preset predetermined value.
5. The idle-state detection circuit of claim 1, wherein
the idle-state condition is to be less than a preset predetermined value.
6. The idle-state detection circuit of claim 1, wherein
the specified number of loops can be arbitrarily set.
7. The idle-state detection circuit of claim 1, wherein
the particular address is located in a previously specified address area.
8. The idle-state detection circuit of claim 1, wherein
the predetermined number of clocks can be arbitrarily set.
9. The idle-state detection circuit of claim 1, further comprising:
an idle-state history storage section configured to store an address referred to by the processor when it is determined by the decision section that the processor is in an idle state, wherein
the decision section determines that the processor is in an idle state without comparing the number of iterations with the specified number of loops when it has been detected that the address referred to by the processor matches the address stored by the idle-state history storage section.
10. The idle-state detection circuit of claim 1, wherein
the decision section determines that the processor is not in an idle state when at least one of that an address referred to by the processor does not match the particular address, or that data loaded by the processor does not satisfy the idle-state condition, has been detected.
11. A semiconductor integrated circuit, comprising:
the idle-state detection circuit of claim 1;
the processor; and
a driver circuit configured to supply a clock signal and a drive voltage for driving the processor to the processor,

wherein
the driver circuit reduces at least one of a frequency of the clock signal or a voltage value of the drive voltage if it is determined by the decision section that the processor is in an idle state.
12. An idle-state detection method for detecting an idle state of a processor, comprising the steps of:
(a) detecting that the processor repeats every predetermined number of clocks an operation to load data satisfying a preset idle-state condition from a particular address; and
(b) determining that the processor is in an idle state if a number of iterations detected in the step (a) is greater than a preset specified number of loops.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. An apparatus, comprising:
a sealing device, including:
a first portion;
a first diameter formed as part of the first portion;
a second portion connected to the first portion;
a second diameter formed as part of the second portion;
a tapered portion formed as part of the second portion;
an adhesive located between and connecting the first portion to the second portion;
a leak test aperture;
an upper diameter portion being part of the leak test aperture; and
a lower diameter portion being part of the leak test aperture;
wherein the second diameter is larger than the first diameter, and the sealing device is disposed in the leak test aperture to prevent moisture and debris from passing through the leak test aperture, and the tapered portion is smaller than the second diameter such that the tapered portion is located in the lower diameter portion formed as part of the leak test aperture.
2. The apparatus of claim 1, further comprising:
an inner surface formed as part of the leak test aperture, the upper diameter portion being part of the inner surface, and the lower diameter portion being part of the inner surface;
wherein the first portion contacts the upper diameter portion of the inner surface and the second portion contacts both the upper diameter portion and the lower diameter portion of the inner surface when the sealing device is disposed in the leak test aperture such that the first portion is in contact with the inner surface to maintain the position of the sealing device in the leak test aperture, and the second portion is in contact with the inner surface to seal the leak test aperture.
3. The apparatus of claim 1, wherein the first portion is made of metal, and the second portion is made of silicon.
4. An assembly for sealing an aperture, comprising:
a sealing device;
a first portion formed as part of the sealing device, the first portion having a first diameter;
a second portion formed as part of the sealing device such that the first portion is connected to the second portion, the second portion having a second diameter;
a tapered portion formed as part of the second portion, the tapered portion being smaller than the second diameter;
an adhesive located between and connecting the first portion to the second portion; and
a leak test aperture for selectively receiving the sealing device;
an upper diameter portion formed as part of the leak test aperture;
a lower diameter portion formed as part of the leak test aperture;
wherein the first portion and the second portion are disposed in the leak test aperture such that the tapered portion is disposed in the lower diameter portion, sealing the leak test aperture.
5. The assembly for sealing an aperture of claim 4, further comprising:
an inner surface formed as part of the leak test aperture, the upper diameter portion being part of the inner surface, and the lower diameter portion being part of the inner surface;
wherein the first portion is in contact with the upper diameter portion of the inner surface to maintain the position of the sealing device in the leak test aperture, and the second portion is in contact with both the upper diameter portion and the lower diameter portion of the inner surface to seal the leak test aperture.
6. The assembly of claim 5, wherein the first diameter is smaller than the second diameter, and the tapered portion is smaller than the first diameter.
7. The assembly of claim 4, wherein the first portion is made of metal, and the second portion is made of silicon.
8. An assembly for sealing an aperture of an ECU, comprising:
a sealing device;
a leak test aperture, the sealing device selectively disposed in the leak test aperture;
an inner surface formed as part of the leak test aperture;
a first portion having a first diameter, the first portion formed as part of the sealing device;
a second portion connected to the first portion, the second portion having a second diameter, the second portion formed as part of the sealing device;
an adhesive located between and connecting the first portion to the second portion;
a tapered portion formed as part of the second portion, the tapered portion being smaller than the second diameter; and
an upper diameter portion formed as part of the leak test aperture, the upper diameter portion being part of the inner surface;
a lower diameter portion formed as part of the leak test aperture, the lower diameter portion being part of the inner surface;
wherein the sealing device is press-fitted into the leak aperture such that the first diameter is in contact with the upper diameter portion of the inner surface and the second diameter is in contact with both the upper diameter portion and the lower diameter portion of the inner surface such that the tapered portion is disposed in the lower diameter portion of the leak test aperture when the sealing device is disposed in the leak test aperture, preventing moisture and debris from passing through the leak test aperture.
9. The assembly of claim 8, wherein the second diameter is larger than the first diameter such that the second diameter of the second portion applies a pressure to the inner surface of the leak test aperture, forming a seal.
10. The assembly of claim 8, wherein the first portion is made of metal, and the second portion is made of silicon.