1460756855-ea26b304-f84b-4d93-829f-cd046d0146e6

1. A Group III nitride semiconductor light-emitting device, comprising:
a substrate including an embossed main surface;
a Group III nitride semiconductor layer formed on the main surface of the substrate; and
non-translucent electrodes which are electrically conducted to the Group III nitride semiconductor layer,
wherein the substrate comprises a heterogeneous substrate having a chemical composition different from that of the Group III nitride semiconductor layer;
wherein the heterogeneous substrate includes a first region including a plurality of protrusions, and a second region including a plurality of protrusions which are arranged at a pitch larger than that of the protrusions in the first region, each of the protrusions of the second region has a hexagonal pyramidal shape,
wherein the second region has a perimeter being included within a region defined by a region perimeter located 6 \u03bcm or less outward from a perimeter of a projection area of each of the non-translucent electrodes as viewed through the main surface of the heterogeneous substrate, and is defined by a region perimeter located 6 \u03bcm or less inward from the perimeter of the projection area,
wherein a portion of the semiconductor layer above the second region exhibits a threading dislocation density higher than that of a portion of the semiconductor layer above the first region, and
wherein light distribution in the second region is larger than light distribution in the first region.
2. The Group III nitride semiconductor light-emitting device according to claim 1, wherein, in the second region, the protrusions located more distant from a boundary between the first region and the second region are arranged at a larger pitch.
3. The Group III nitride semiconductor light-emitting device according to claim 2, wherein a relation of L2=a\xd7L1 and a relation of 1.1\u2266a\u22663 are satisfied, wherein L1 represents a pitch between adjacent protrusions in the first region, and L2 represents a pitch between adjacent protrusions in the second region.
4. The Group III nitride semiconductor light-emitting device according to claim 3, which comprises a transparent electrode, wherein the Group III nitride semiconductor layer includes a p-type contact layer, and the transparent electrode is formed on the p-type contact layer.
5. The Group III nitride semiconductor light-emitting device according to claim 3, wherein at least one of the non-translucent electrodes comprises a pad electrode which is to be electrically conducted to an external electrode.
6. The Group III nitride semiconductor light-emitting device according to claim 5, wherein the non-translucent electrodes comprise a plurality of dot electrodes which are distributed with respect to a light-emitting surface, and one or more wiring electrodes for electrically connecting the dot electrodes to the pad electrodes, the wiring electrodes comprising comb electrodes.
7. The Group III nitride semiconductor light-emitting device according to claim 2, wherein at least one of the non-translucent electrodes comprises a pad electrode which is to be electrically conducted to an external electrode.
8. The Group III nitride semiconductor light-emitting device according to claim 7, wherein the non-translucent electrodes comprise a plurality of dot electrodes which are distributed with respect to a light-emitting surface, and one or more wiring electrodes for electrically connecting the dot electrodes to the pad electrodes, the wiring electrodes comprising comb electrodes.
9. The Group III nitride semiconductor light-emitting device according to claim 2, which comprises a transparent electrode, wherein the Group III nitride semiconductor layer includes a p-type contact layer, and the transparent electrode is formed on the p-type contact layer.
10. The Group III nitride semiconductor light-emitting device according to claim 1, wherein a relation of L2=a\xd7L1 and a relation of 1.1\u2266a\u22663 are satisfied, wherein L1 represents a pitch between adjacent protrusions in the first region, and L2 represents a pitch between adjacent protrusions in the second region.
11. The Group III nitride semiconductor light-emitting device according to claim 10, wherein at least one of the non-translucent electrodes comprises a pad electrode which is to be electrically conducted to an external electrode.
12. The Group III nitride semiconductor light-emitting device according to claim 11, wherein the non-translucent electrodes comprise a plurality of dot electrodes which are distributed with respect to a light-emitting surface, and one or more wiring electrodes for electrically connecting the dot electrodes to the pad electrodes, the wiring electrodes comprising comb electrodes.
13. The Group III nitride semiconductor light-emitting device according to claim 10, which comprises a transparent electrode, wherein the Group III nitride semiconductor layer includes a p-type contact layer, and the transparent electrode is formed on the p-type contact layer.
14. The Group III nitride semiconductor light-emitting device according to claim 1, wherein at least one of the non-translucent electrodes comprises a pad electrode which is to be electrically conducted to an external electrode.
15. The Group III nitride semiconductor light-emitting device according to claim 1, which comprises a transparent electrode, wherein the Group III nitride semiconductor layer includes a p-type contact layer, and the transparent electrode is formed on the p-type contact layer.
16. A Group III nitride semiconductor light-emitting device comprising:
a substrate including an embossed main surface;
a Group III nitride semiconductor layer formed on the main surface of the substrate; and
non-translucent electrodes which are electrically conducted to the Group III nitride semiconductor layer, the non-translucent electrodes comprising a pad electrode, a plurality of dot electrodes which are distributed with respect to a light-emitting surface, and one or more wiring electrodes for electrically connecting the dot electrodes to the pad electrodes, the wiring electrodes comprising comb electrodes,
wherein the substrate comprises a heterogeneous substrate including a chemical composition different from that of the Group III nitride semiconductor layer,
wherein the heterogeneous substrate includes a first region including a plurality of protrusions, and a second region including a plurality of protrusions which are arranged at a pitch larger than that of the protrusions in the first region, and each of the protrusions of the second region has a hexagonal pyramidal shape,
wherein the second region has a perimeter being included within a region defined by a region perimeter located 6 \u03bcm or less outward from a perimeter of a projection area of each of the non-translucent electrodes as viewed through the main surface of the heterogeneous substrate, and is defined by a region perimeter located 6 \u03bcm or less inward from the perimeter of the projection area.
17. A Group III nitride semiconductor light-emitting device, comprising:
a substrate including an embossed main surface;
a Group III nitride semiconductor layer formed on the main surface of the substrate; and
non-translucent electrodes which are electrically conducted to the Group III nitride semiconductor layer,
wherein the substrate comprises a heterogeneous substrate including a chemical composition different from that of the Group III nitride semiconductor layer,
wherein the heterogeneous substrate includes a first region including a plurality of protrusions, and a second region including a plurality of protrusions which are arranged at a pitch larger than that of the protrusions in the first region,
wherein the second region has a perimeter being included within a region defined by a region perimeter located 6 \u03bcm or less outward from a perimeter of a projection area of each of the non-translucent electrodes as viewed through the main surface of the heterogeneous substrate, and is defined by a region perimeter located 6 \u03bcm or less inward from the perimeter of the projection area, and
wherein a region between a projection area of the non-translucent electrodes as viewed through the main surface of the heterogeneous substrate and an edge of the light-emitting device includes the first region.
18. The Group III nitride semiconductor light-emitting device according to claim 17, wherein the first region, the second region, the first region, the second region, and the first region are disposed in order from an edge of the light-emitting device to another edge of the light-emitting device.
19. The Group III nitride semiconductor light-emitting device according to claim 17, wherein the first region is disposed in an outermost portion of the light-emitting device.
20. The Group III nitride semiconductor light-emitting device according to claim 19, wherein, with respect to the first region, the second region is disposed in an inner portion of the light-emitting device.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A semiconductor element mounting board, comprising:
a board having surfaces;
a semiconductor element mounted on one of the surfaces of the board;
a first layer into which the semiconductor element is embedded, the first layer being provided on the one surface of the board;
a second layer provided on the other surface of the board, the second layer being constituted from the same material as that of the first layer, the constituent material of the second layer having the same composition ratio as that of the constituent material of the first layer; and
surface layers provided on the first and second layers, respectively, each of the surface layers being formed from at least a single layer,
wherein each of the surface layers has rigidity higher than that of each of the first and second layers.
2. The semiconductor element mounting board as claimed in claim 1, wherein in the case where a Young’s modulus of each surface layer at 25\xb0 C. is defined as X GPa and a Young’s modulus of the first layer at 25\xb0 C. is defined as Y GPa, the X and the Y satisfy a relation of 0.5\u2266X\u2212Y\u226613.
3. The semiconductor element mounting board as claimed in claim 2, wherein the Young’s modulus of the surface layer at 25\xb0 C. is in the range of 4 to 15 GPa.
4. The semiconductor element mounting board as claimed in claim 2, wherein the Young’s modulus of the first layer at 25\xb0 C. is in the range of 2 to 10 GPa.
5. The semiconductor element mounting board as claimed in claim 1, wherein in the case where a coefficient of thermal expansion of the surface layer in an inplane direction thereof measured based on JIS C 6481 at a temperature of 20\xb0 C. to a glass-transition temperature Tga\xb0 C. thereof, which is measured based on JIS C 6481, is defined as A ppm\xb0 C. and a coefficient of thermal expansion of the first layer in an inplane direction thereof measured based on JIS C 6481 at a temperature of 20\xb0 C. to a glass-transition temperature Tgb\xb0 C. thereof, which is measured based on JIS C 6481, is defined as B ppm\xb0 C., the A and the B satisfy a relation of 0.5\u2266B-A\u226650.
6. The semiconductor element mounting board as claimed in claim 5, wherein the coefficient of thermal expansion of the surface layer in the inplane direction thereof measured based on JIS C 6481 at the temperature of 20\xb0 C. to the glass-transition temperature Tga\xb0 C., which is measured based on JIS C 6481, is 40 ppm\xb0 C. or lower.
7. The semiconductor element mounting board as claimed in claim 5, wherein the coefficient of thermal expansion of the first layer in the inplane direction thereof measured based on JIS C 6481 at the temperature of 20\xb0 C. to the glass-transition temperature Tgb\xb0 C., which is measured based on JIS C 6481, is in the range of 25 to 50 ppm\xb0 C.
8. The semiconductor element mounting board as claimed in claim 1, wherein a glass-transition temperature Tga of the surface layer, which is measured based on JIS C 6481, is in the range of 100 to 300\xb0 C.
9. The semiconductor element mounting board as claimed in claim 1, wherein a glass-transition temperature Tgb of the first layer, which is measured based on JIS C 6481, is in the range of 100 to 250\xb0 C.
10. The semiconductor element mounting board as claimed in claim 1, wherein a Young’s modulus of the board at 25\xb0 C. is in the range of 20 to 50 GPa.
11. The semiconductor element mounting board as claimed in claim 1, wherein a coefficient of thermal expansion of the board in an inplane direction thereof measured based on JIS C 6481 at a temperature of 20\xb0 C. to a glass-transition temperature Tgc\xb0 C. thereof, which is measured based on JIS C 6481, is 13 ppm\xb0 C. or lower.
12. The semiconductor element mounting board as claimed in claim 1, wherein the semiconductor element is mounted on the board through a film.
13. The semiconductor element mounting board as claimed in claim 1, wherein the surface layer is mainly composed of a resin material containing cyanate resin and an inorganic filler.
14. The semiconductor element mounting board as claimed in claim 13, wherein an amount of the resin material contained in the surface layer is in the range of 30 to 70 wt %.
15. The semiconductor element mounting board as claimed in claim 13, wherein an amount of the inorganic filler contained in the surface layer is in the range of 5 to 40 wt %.
16. The semiconductor element mounting board as claimed in claim 13, wherein the resin material further contains epoxy resin, and
wherein in the case where an amount of the cyanate resin contained in the resin material is defined as C wt % and an amount of the epoxy resin contained in the resin material is defined as D wt %, the C and the D satisfy a relation of 0.5\u2266DC\u22664.
17. The semiconductor element mounting board as claimed in claim 13, wherein the resin material further contains phenoxy resin, and
wherein in the case where an amount of the cyanate resin contained in the resin material is defined as C wt % and an amount of the phenoxy resin contained in the resin material is defined as E wt %, the C and the E satisfy a relation of 0.2\u2266EC\u22662.