1. A method for correcting a formatting data error in a flash memory, said method comprising:
discovering a formatting error in a first formatting data of a first flash memory, wherein said first formatting data includes a first partition table information of said first flash memory;
extracting from a second flash memory storing second data a second formatting data and transferring said second formatting data to a formatting modification storage unit, wherein said second formatting data includes a second partition table information of said second flash memory, wherein said first partition table information is nonidentical to said second partition table information before a formatting data error is present in said first flash memory;
replacing in said first flash memory said erroneous first formatting data with formatting data modified within said formatting modification storage unit using template information derived from said second formatting data, without requiring redundant copies of said first formatting data; and
storing first data in said first flash memory with said formatting data modified within said formatting modification unit using said template information derived from said second formatting data, wherein said first data is different from said second data, wherein said formatting data error is an error in said first flash memory that stores partition table information.
2. The method of claim 1, further comprising the step of generating a copy of said second formatting data of said second flash memory.
3. The method of claim 2, wherein the step of generating a copy of said second formatting data of said second flash memory further comprises the step of copying a binary image of said second formatting data of said second flash memory onto said formatting modification storage unit.
4. The method of claim 3, wherein said step of copying a binary image of said second formatting data of said second flash memory onto said formatting modification storage unit further comprises the step of copying a binary image of said second formatting data of said second flash memory onto a formatting modification storage unit in a memory controller.
5. The method of claim 1, wherein said step of discovering a formatting error in a first formatting data of a first flash memory further comprises:
verifying a first header in said first flash memory;
verifying a first partition table offset in said first flash memory;
verifying a first validity of a partition name in said first flash memory; and
verifying a first partition table size in said first flash memory.
6. The method of claim 1, wherein said step of replacing in said first flash memory said erroneous first formatting data with formatting data modified within said formatting modification storage unit using template information derived from said second formatting data further comprises the step of modifying said second formatting data of said second flash memory to construct a modification of said first formatting data of said first flash memory.
7. The method of claim 1, wherein said step of extracting from said second flash memory storing second data said second formatting data further comprises extracting a second header, a second partition table offset, a second partition name, and a second partition table size from said second flash memory.
8. A system for correcting a formatting data error in a flash memory, said system comprising:
at least one processing unit;
at least one memory coupled to said at least one processing unit;
a memory controller coupled to said at least one memory, wherein said memory controller includes a formatting modification storage unit; and
wherein said at least one memory stores executable code for:
discovering a formatting error in a first formatting data of a first flash memory, wherein said first formatting data includes a first partition table information of said first flash memory;
extracting from a second flash memory storing second data a second formatting data and transferring said second formatting data to a formatting modification storage unit, wherein said second formatting data includes a second partition table information of said second flash memory, wherein said first partition table information is nonidentical to said second partition table information before a formatting data error is present in said first flash memory;
replacing in said first flash memory said erroneous first formatting data with formatting data modified within said formatting modification storage unit using template information derived from said second formatting data, without requiring redundant copies of said first formatting data; and
storing first data in said first flash memory with said formatting data modified within said formatting modification unit using said template information derived from said second formatting data, wherein said first data is different from said second data, wherein said formatting data error is an error in said first flash memory that stores partition table information.
9. The system of claim 8, wherein said at least one memory stores executable code for generating a copy of said second formatting data of said second flash memory.
10. The system of claim 9, wherein said executable code for generating a copy of said second formatting data of said second flash memory further comprises executable code for copying a binary image of said second formatting data of said second flash memory onto said formatting modification storage unit.
11. The system of claim 10, wherein said executable code for copying a binary image of said second formatting data of said second flash memory onto said formatting modification storage unit further comprises executable code for copying a binary image of said second formatting data of said second flash memory onto a formatting modification storage unit in a memory controller.
12. The system of claim 8, wherein said executable code for discovering a formatting error in a first formatting data of a first flash memory further comprises:
executable code for verifying a first header in said first flash memory;
executable code for verifying a first partition table offset in said first flash memory;
executable code for verifying a first validity of a partition name in said first flash memory; and
executable code for verifying a first partition table size in said first flash memory.
13. The system of claim 8, wherein said executable code for replacing in said first flash memory said erroneous first formatting data with formatting data modified within said formatting modification storage unit using template information derived from said second formatting data further comprises executable code for modifying said second formatting data of said second flash memory to construct a modification of said first formatting data of said first flash memory.
14. The system of claim 8, wherein said executable code for extracting from said second flash memory storing second data said second formatting data further comprises executable code for extracting a second header, a second partition table offset, a second partition name, and a second partition table size from said second flash memory.
15. A tangible machine-readable storage medium having a plurality of instructions processable by at least one processing unit contained within a machine embodied therein, wherein said plurality of instructions, when processed by said at least one processing unit, causes said machine to perform a method for correcting a formatting data error in a flash memory comprising:
discovering a formatting error in a first formatting data of a first flash memory, wherein said first formatting data includes a first partition table information of said first flash memory;
extracting from a second flash memory storing second data a second formatting data and transferring said second formatting data to a formatting modification storage unit, wherein said second formatting data includes a second partition table information of said second flash memory, wherein said first partition table information is nonidentical to said second partition table information before a formatting data error is present in said first flash memory;
replacing in said first flash memory said erroneous first formatting data with formatting data modified within said formatting modification storage unit using template information derived from said second formatting data, without requiring redundant copies of said first formatting data; and
storing first data in said first flash memory with said formatting data modified within said formatting modification unit using said template information derived from said second formatting data, wherein said first data is different from said second data, wherein said formatting data error is an error in said first flash memory that stores partition table information.
16. The tangible machine-readable storage medium of claim 15, said method further comprising the step of generating a copy of said second formatting data of said second flash memory.
17. The tangible machine-readable storage medium of claim 16, wherein the step of generating a copy of said second formatting data of said second flash memory further comprises the step of copying a binary image of said second formatting data of said second flash memory onto said formatting modification storage unit.
18. The tangible machine-readable storage medium of claim 17, wherein said step of copying a binary image of said second formatting data of said second flash memory onto said formatting modification storage unit further comprises the step of copying a binary image of said second formatting data of said second flash memory onto a formatting modification storage unit in a memory controller.
19. The tangible machine-readable storage medium of claim 15, wherein said step of discovering a formatting error in a first formatting data of a first flash memory further comprises:
verifying a first header in said first flash memory;
verifying a first partition table offset in said first flash memory;
verifying a first validity of a partition name in said first flash memory; and
verifying a first partition table size in said first flash memory.
20. The tangible machine-readable storage medium of claim 15, wherein said step of replacing in said first flash memory said erroneous first formatting data with formatting data modified within said formatting modification storage unit using template information derived from said second formatting data further comprises the step of modifying said second formatting data of said second flash memory to construct a modification of said first formatting data of said first flash memory.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method of forming a planar field effect transistor comprising:
forming a semiconductor layer with a plurality of first sections and a plurality of second sections such that said second sections traverse said first sections and such that said first sections and said second sections are separated by spaces;
patterning a gate conductor on said semiconductor layer such that said gate conductor extends across said first sections and said spaces, such that said gate conductor has first portions above each of said first sections and second portions above each of said spaces, and such that a first length of said first portions is greater than a second length of said second portions; and
forming a plurality of contacts to said second sections such that said contacts are between said first sections and opposite said second portions.
2. The method of claim 1, further comprising before said patterning of said gate conductor and said forming of said contacts, predetermining said first length, said second length and a pitch between said contacts in order to simultaneously maximize transistor density, minimize leakage power and maintain parasitic capacitance below a preset level.
3. The method of claim 1, wherein said gate conductor is formed such that said first length is approximately 1.2 to 2.5 times longer than said second length.
4. The method of claim 1, further comprising doping said second sections to form sourcedrain diffusion regions.
5. A method of forming a non-planar field effect transistor comprising:
forming a plurality of semiconductor fins and a plurality of semiconductor mesas on an insulator layer such that said semiconductor mesas traverse said semiconductor fins and such that said semiconductor fins and said semiconductor mesas are separated by spaces;
patterning a gate conductor above said semiconductor fins such that said gate conductor extends across said semiconductor fins and said spaces, such that said gate conductor has first portions above said semiconductor fins and second portions above said spaces, and such that a first length of said first portions is greater than a second length of said second portions; and
forming a plurality of contacts to said semiconductor mesas such that said contacts are between said semiconductor fins and opposite said second portions.
6. The method of claim 5, further comprising before said patterning of said gate conductor and said forming of said contacts, predetermining said first length, said second length and a pitch between said contacts in order to simultaneously maximize transistor density, minimize leakage power and maintain parasitic capacitance below a preset level.
7. The method of claim 5, wherein said gate conductor is formed such that said first length is approximately 1.2 to 2.5 times longer than said second length.
8. The method of claim 5, further comprising doping said second sections to form sourcedrain diffusion regions.
9. A method of forming a planar field effect transistor comprising:
forming a semiconductor layer with a plurality of first sections and a plurality of second sections such that said second sections traverse said first sections and such that said first sections and said second sections are separated by spaces;
patterning a gate conductor on said semiconductor layer such that said gate conductor extends across said first sections and said spaces, such that said gate conductor has first portions above each of said first sections and second portions above each of said spaces, and such that a first length of said first portions is greater than a second length of said second portions; and
forming a plurality of contacts to said second sections such that said contacts are between said first sections and opposite said second portions;
further comprising before said patterning of said gate conductor and said forming of said contacts, predetermining said first length, said second length and a pitch between said contacts in order to simultaneously maximize transistor density, minimize leakage power and maintain parasitic capacitance below a preset level.
10. The method of claim 9, wherein said gate conductor is formed such that said first length is approximately 1.2 to 2.5 times longer than said second length.
11. The method of claim 10, further comprising doping said second sections to form sourcedrain diffusion regions.