1. A semiconductor device comprising:
a modulation circuit, a demodulation circuit, a logic circuit, a nonvolatile memory circuit, a level shift circuit, a control circuit, and an antenna circuit, which are formed over an insulating substrate,
wherein the modulation circuit and the demodulation circuit are electrically connected to the antenna circuit,
wherein the demodulation circuit is connected to the logic circuit,
wherein the logic circuit is connected to the control circuit and the level shift circuit,
wherein a signal inputted from the antenna circuit is operated by the logic circuit and inputted to the level shift circuit,
wherein the nonvolatile memory circuit includes means for storing an output signal of the level shift circuit,
wherein the nonvolatile memory circuit is for storing data by charge injection,
wherein the control circuit writes data to the nonvolatile memory circuit only once, and
wherein the nonvolatile memory circuit writes data in accordance with the instruction of the control circuit and the level shift circuit.
2. The semiconductor device according to claim 1, wherein an element constituting the nonvolatile memory circuit stores data by charge injection into a floating gate.
3. The semiconductor device according to claim 1, wherein an element constituting the nonvolatile memory circuit stores data by charge injection into a gate insulating film.
4. The semiconductor device according to claim 1, wherein a power supply used by the nonvolatile memory circuit for storing data is obtained by rectifying and boosting the signal outputted from the antenna circuit.
5. The semiconductor device according to claim 1, wherein a power supply used by the nonvolatile memory circuit for storing data is obtained from an external high voltage power supply.
6. The semiconductor device according to claim 1, wherein at least one of the modulation circuit, the demodulation circuit, the logic circuit, and the nonvolatile memory circuit is constituted by a thin film transistor.
7. The semiconductor device according to claim 1, wherein the insulating substrate is selected from the group consisting of a glass substrate, a plastic substrate and a film insulator.
8. The semiconductor device according to claim 1, wherein the antenna circuit is formed over at least one of the modulation circuit, the demodulation circuit, the logic circuit, and the nonvolatile memory circuit.
9. The semiconductor device according to claim 1, wherein a signal inputted to the antenna circuit is a wireless signal.
10. A product having the semiconductor device according to claim 1, wherein the product is selected from the group consisting of an IC card, an IC tag, an RFID, a transponder, a bill, a security, a passport, an electronic apparatus, a bag, and clothes.
11. The semiconductor device according to claim 1, wherein a thin film transistor in the logic circuit and a thin film transistor in the nonvolatile memory circuit are formed simultaneously.
12. The semiconductor device according to claim 1, wherein the logic circuit includes at least a switch and a volatile memory circuit.
13. The semiconductor device according to claim 12, wherein in the case of the switch is on, the signal is outputted to the level shift circuit.
14. The semiconductor device according to claim 1, wherein the control circuit writes only first data to the nonvolatile memory circuit.
15. A semiconductor device comprising:
a modulation circuit, a demodulation circuit, a logic circuit, a nonvolatile memory circuit, a level shift circuit, a control circuit, and an antenna circuit, which are formed over an insulating substrate,
wherein the modulation circuit and the demodulation circuit are electrically connected to the antenna circuit,
wherein the demodulation circuit is connected to the logic circuit,
wherein the logic circuit is connected to the control circuit and the level shift circuit,
wherein a signal inputted from the antenna circuit is operated by the logic circuit and inputted to the level shift circuit,
wherein the nonvolatile memory circuit includes means for storing an output signal of the level shift circuit,
wherein the nonvolatile memory circuit is for storing data by charge injection,
wherein the control circuit controls whether data can be written to the nonvolatile memory circuit or not depending on the data stored in the nonvolatile memory circuit, and
wherein the nonvolatile memory circuit writes data in accordance with the instruction of the control circuit and the level shift circuit.
16. The semiconductor device according to claim 15, wherein an element constituting the nonvolatile memory circuit stores data by charge injection into a floating gate.
17. The semiconductor device according to claim 15, wherein an element constituting the nonvolatile memory circuit stores data by charge injection into a gate insulating film.
18. The semiconductor device according to claim 15, wherein a power supply used by the nonvolatile memory circuit for storing data is obtained by rectifying and boosting the signal outputted from the antenna circuit.
19. The semiconductor device according to claim 15, wherein a power supply used by the nonvolatile memory circuit for storing data is obtained from an external high voltage power supply.
20. The semiconductor device according to claim 15, wherein at least one of the modulation circuit, the demodulation circuit, the logic circuit, and the nonvolatile memory circuit is constituted by a thin film transistor.
21. The semiconductor device according to claim 15, wherein the insulating substrate is selected from the group consisting of a glass substrate, a plastic substrate and a film insulator.
22. The semiconductor device according to claim 15, wherein the antenna circuit is formed over at least one of the modulation circuit, the demodulation circuit, the logic circuit, and the nonvolatile memory circuit.
23. The semiconductor device according to claim 15, wherein a signal inputted to the antenna circuit is a wireless signal.
24. A product having the semiconductor device according to claim 15, wherein the product is selected from the group consisting of an IC card, an IC tag, an RFID, a transponder, a bill, a security, a passport, an electronic apparatus, a bag, and clothes.
25. The semiconductor device according to claim 15, wherein a thin film transistor in the logic circuit and a thin film transistor in the nonvolatile memory circuit are formed simultaneously.
26. The semiconductor device according to claim 15, wherein the logic circuit includes at least a switch and a volatile memory circuit.
27. The semiconductor device according to claim 26, wherein in the case of the switch is on, the signal is outputted to the level shift circuit.
28. The semiconductor device according to claim 15, wherein the control circuit writes only first data to the nonvolatile memory circuit.
29. A semiconductor device comprising:
an antenna circuit;
a modulation circuit electrically connected to the antenna circuit;
a demodulation circuit electrically connected to the antenna circuit;
a logic circuit electrically connected to the demodulation circuit;
a nonvolatile memory circuit having means for storing an output signal of the logic circuit and for storing data by charge injection;
a control circuit capable of writing data to the nonvolatile memory circuit only once, and
a level shift circuit electrically connected to the nonvolatile memory circuit,
wherein the logic circuit is connected to the control circuit and the level shift circuit,
wherein a signal inputted from the antenna circuit is operated by the logic circuit and inputted to the level shift circuit, and
wherein the nonvolatile memory circuit writes data in accordance with the instruction of the control circuit and the level shift circuit.
30. The semiconductor device according to claim 29, wherein an element constituting the nonvolatile memory circuit stores data by charge injection into a floating gate.
31. The semiconductor device according to claim 29, wherein an element constituting the nonvolatile memory circuit stores data by charge injection into a gate insulating film.
32. The semiconductor device according to claim 29, wherein a power supply used by the nonvolatile memory circuit for storing data is obtained by rectifying and boosting the signal outputted from the antenna circuit.
33. The semiconductor device according to claim 29, wherein a power supply used by the nonvolatile memory circuit for storing data is obtained from an external high voltage power supply.
34. The semiconductor device according to claim 29, wherein at least one of the modulation circuit, the demodulation circuit, the logic circuit, and the nonvolatile memory circuit is constituted by a thin film transistor.
35. The semiconductor device according to claim 29, wherein the insulating substrate is selected from the group consisting of a glass substrate, a plastic substrate and a film insulator.
36. The semiconductor device according to claim 29, wherein the antenna circuit is formed over at least one of the modulation circuit, the demodulation circuit, the logic circuit, and the nonvolatile memory circuit.
37. The semiconductor device according to claim 29, wherein a signal inputted to the antenna circuit is a wireless signal.
38. A product having the semiconductor device according to claim 29, wherein the product is selected from the group consisting of an IC card, an IC tag, an REID, a transponder, a bill, a security, a passport, an electronic apparatus, a bag, and clothes.
39. The semiconductor device according to claim 29, wherein a thin film transistor in the logic circuit and a thin film transistor in the nonvolatile memory circuit are formed simultaneously.
40. The semiconductor device according to claim 29, wherein the logic circuit includes at least a switch and a volatile memory circuit.
41. The semiconductor device according to claim 40, wherein in the case of the switch is on, the signal is outputted to the level shift circuit.
42. The semiconductor device according to claim 29, wherein the control circuit writes only first data to the nonvolatile memory circuit.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A semiconductor structure comprising:
a conductive substrate;
a first semiconductor die and a second semiconductor die, wherein said first semiconductor die and said second semiconductor die are coupled to said conductive substrate, and wherein said first semiconductor die and said semiconductor die are separated by a trench;
a passivation layer on a front side of said first and said second semiconductor die, wherein said passivation layer covers a portion of said first semiconductor die and a portion of said second semiconductor die; and
a metal layer lining the bottom and walls of said trench and extending onto said passivation layer, wherein said metal layer lining leaves at least a portion of said passivation layer on said front side of said first and said second semiconductor die exposed.
2. The semiconductor structure as described in claim 1 wherein said front side of said first and said second semiconductor die comprise at least one connection pad.
3. The semiconductor structure as described in claim 2, wherein said metal layer is electrically insulated from said connection pad.
4. The semiconductor structure of claim 2 further comprising a second metal layer is in electrical contact with said connection pad.
5. The semiconductor structure as described in claim 1, wherein portions of said walls are in contact with at least a portion of said conductive substrate.
6. The semiconductor structure as described in claim 1, wherein a portion of said bottom of said trench is in contact with at least a portion of said conductive substrate.
7. The semiconductor structure as described in claim 1, wherein said first and said second exposed portions form a gate and a source for said first and said second semiconductor die.
8. The semiconductor structure as described in claim 7, wherein said source and said gate are formed on one side of said first and said second semiconductor die, and wherein a drain is formed on a side opposite to said side comprising said gate and said source.
9. The semiconductor structure as described in claim 1, wherein said metal layer further comprises a plurality of sub-layers.
10. The semiconductor structure as described in claim 1, wherein said first semiconductor die is a MOSFET.
11. The semiconductor structure as described in claim 1, wherein said first semiconductor die is a junction field effect transistor.
12. A semiconductor structure comprising:
a conductive substrate;
a plurality of semiconductor dice attached to the conductive substrate and attached to a passivation layer on a front side of each die, wherein rows of the dice are separated from each other by a plurality of parallel trenches; and
a metal layer lining the bottoms and walls of the trenches and extending onto the passivation layer.
13. The semiconductor structure of claim 12 wherein the front side of each die comprises at least one connection pad, the metal layer being electrically insulated from the connection pad.
14. The semiconductor structure of claim 12 comprising a second metal layer in electrical contact with the connection pad.