1. A system, comprising:
a level shifter configured to receive a first clock signal from a first power domain, to receive a counter signal, to select one of a plurality of intermediate voltages in response to the received counter signal, and to generate a second clock signal in response to the received first clock signal and the selected intermediate voltage;
a counter coupled to the level shifter and configured to receive a divided clock signal and a comparison result signal, and to generate the counter signal in response to the received divided clock signal and comparison result signal;
a divider coupled to the counter and configured to receive the first clock signal and to generate the divided clock signal in response to the received first clock signal;
a filter coupled to the level shifter and configured to receive the second clock signal and to generate a first comparison signal in response to the received second clock signal;
a fixed potential configured to generate a second comparison signal; and
a comparator coupled to the filter, the fixed potential, and the counter and configured to receive the first comparison signal and the second comparison signal, and to generate the comparison result signal in response to the received first comparison signal and the second comparison signal.
2. The system as recited in claim 1, wherein the level shifter further comprises a level shifter control system, comprising:
a plurality of resistors coupled in series;
a multiplexer coupled to the plurality of resistors and configured to select a voltage associated with a subset of the plurality of resistors in response to a multiplexer select signal and to generate a multiplexer output in response to the selected voltage;
a decoder coupled to the multiplexer and the counter and configured to generate the multiplexer select signal in response to the counter signal;
an operational amplifier coupled to the multiplexer and configured to generate an operational amplifier output in response to the multiplexer output; and
a switch coupled to the operational amplifier and configured to generate a switch output in response to the operational amplifier output.
3. The system as recited in claim 2, further comprising a unity gain buffer coupled to the switch and configured to generate the second clock signal in response to the switch output.
4. The system as recited in claim 2, further comprising a plurality of level shifter control systems coupled in series.
5. The system as recited in claim 2, wherein the operational amplifier is a digital operational amplifier.
6. The system as recited in claim 2, wherein the switch is a p-type field effect transistor (PFET).
7. The system as recited in claim 1, wherein the comparator is a digital comparator.
8. The system as recited in claim 1, wherein the filter is a low-pass filter.
9. The system as recited in claim 1, wherein a voltage associated with the first power domain is lower than any of the plurality of intermediate voltages.
10. The system as recited in claim 1, wherein a voltage associated with the first power domain is higher than any of the plurality of intermediate voltages.
11. The system as recited in claim 1, wherein the second comparison signal corresponds to a fifty percent duty cycle of the second clock signal.
12. A method for automatically selecting intermediate power supply voltages, comprising:
receiving a first clock signal from a first power domain;
receiving a counter signal;
selecting one of a plurality of pre-determined intermediate power supply voltages in response to the counter signal;
generating a second clock signal in response to the first clock signal and the selected one of a plurality of pre-determined intermediate power voltages;
filtering the second clock signal to generate a first comparison signal;
receiving a second comparison signal from a fixed potential;
comparing the received first comparison signal and the second comparison signal to generate a comparison result signal;
generating a divided clock signal in response to the received first clock signal; and
generating a counter signal in response to the comparison result signal and the divided clock signal to automatically identify one of the plurality of pre-determined intermediate power supply voltages for selection.
13. The method as recited in claim 12, wherein selecting one of a plurality of pre-determined intermediate power supply voltages in response to the counter signal further comprises:
generating a multiplexer select signal in response to the counter signal;
selecting a voltage associated with a plurality of resistors in response to the multiplexer select signal;
generating a multiplexer output in response to the selected voltage;
generating an opamp output in response to the multiplexer output; and
generating a switch output in response to the opamp output.
14. The method as recited in claim 13, further comprising generating the second clock signal in response to the switch output.
15. The method as recited in claim 12, wherein a voltage associated with the first clock signal is lower than a voltage associated with the second clock signal.
16. The method as recited in claim 12, wherein a voltage associated with the first clock signal is higher than a voltage associated with the second clock signal.
17. The method as recited in claim 12, wherein the second comparison signal corresponds to a fifty percent duty cycle of the second clock signal.
18. A processor for automatically selecting intermediate power supply voltages for intermediate level shifters, the processor including a computer program, comprising:
computer program code for receiving a first clock signal from a first power domain;
computer program code for receiving a counter signal;
computer program code for selecting one of a plurality of pre-determined intermediate power supply voltages in response to the counter signal;
computer program code for generating a second clock signal in response to the first clock signal and the selected one of a plurality of pre-determined intermediate power voltages;
computer program code for filtering the second clock signal to generate a first comparison signal;
computer program code for receiving a second comparison signal from a fixed potential;
computer program code for comparing the received first comparison signal and the second comparison signal to generate a comparison result signal;
computer program code for generating a divided clock signal in response to the received first clock signal; and
computer program code for generating a counter signal in response to the comparison result signal and the divided clock signal to automatically identify one of the plurality of pre-determined intermediate power supply voltages for selection.
19. The processor as recited in claim 18, further comprising:
computer program code for generating a multiplexer select signal in response to the counter signal;
computer program code for selecting a voltage associated with a plurality of resistors in response to the multiplexer select signal;
computer program code for generating a multiplexer output in response to the selected voltage;
computer program code for generating an opamp output in response to the multiplexer output; and
computer program code for generating a switch output in response to the opamp output.
20. The processor as recited in claim 19, further comprising computer program code for generating the second clock signal in response to the switch output.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A composition that undergoes reversible aggregationdeaggregation, wherein said composition is a nanoparticle functionalized with a sterically hindered coating material, wherein said coating comprises:
a headgroup used to anchor coating molecules on the surface of a nanoparticle; a bio-inert terminal functional group used to stabilize the nanoparticle by steric hindrance; and
a variable length body of the coating material that connects the headgroup to a bio-inert terminal functional group andor a recognition moiety, said moiety located near the terminal functional group, wherein the body contains a radical initiator.
2. The composition of claim 1, wherein said nanoparticle is a metal cluster, alloy cluster, metal oxide, quantum dot, nanorod, nanocage, nanodonut or nanoshell.
3. The composition of claim 1, wherein said nanoparticle has a radius of about of 1 nm to about 2000 nm.
4. The composition of claim 3, wherein said nanoparticle has a radius of about 10 nm to about 200 nm.
5. The composition of claim 1, wherein said nanoparticle is magnetic.
6. The composition of claim 1, wherein said nanoparticle is made from a metal of gold, silver, copper, platinum, iridium, osmium, palladium, rhodium, ruthenium, iron, cobalt, or manganese, said nanoparticle is made from silica, or said nanoparticle is made from an alloy or an oxide of said metal.
7. The composition of claim 1, wherein said headgroup is a thiol or a disulfide, or a chemically similar ligand.
8. The composition of claim 1, wherein said functional group is hydroxyl, methyl, ether, amine, andor carboxylic acid.
9. The composition of claim 1, wherein said body is oligoethylene glycol (OEG), polyethylene glycol (PEG), fluorocarbon, andor hydrocarbon.
10. The composition of claim 9, wherein said body has between 3 and 10,000 repeat units.
11. The composition of claim 1, wherein said coating material is (E)-PEG350-4-cyano-4-((E)-((R)-2-cyano-5-(6-mercaptohexylthio)-5-oxopenta-n-2-yl)diazenyl)pentanoic acid, (E)-PEG750-4-cyano-4-(E)-((R)-2-cyano-5-(6-mercaptohexylthio)-5-oxopenta-n-2-yl)diazenyl)pentanoic acid or (E)-PEG2000-4-cyano-4-((E)-((R)-2-cyano-5-(6-mercaptohexylthio)-5-oxopenta-n-2-yl)diazenyl)pentanoic acid or a chemically similar coating material.
12. The composition of claim 1, wherein the coating is further modified with a recognition moiety on the surface of the nanoparticle.
13. The composition of claim 12, wherein the recognition moiety is a carbohydrate, peptide, antibody, enzyme, lectin, receptor, RNA, DNA, LNA, PNA, or molded plastic imprint.
14. A method of forming a reversible aggregatingdeaggregating nanoparticle, comprising the step of:
functionalizing said nanoparticle with a sterically hindered coating material, wherein said coating comprises:
a headgroup used to anchor coating molecules on the surface of a nanoparticle;
a bio-inert terminal functional group used to stabilize the nanoparticle by steric hindrance: and
a variable length body of the coating material that connects the headgroup to a bio-inert terminal functional group andor a recognition moiety, said moiety located near the terminal functional group, wherein the body contains a radical initiator.
15. The method of claim 14, wherein said nanoparticle is a metal cluster, alloy cluster, metal oxide, quantum dot, nanorod, nanocage, nanodonut or nanoshell.
16. The method of claim 14, wherein said nanoparticle has a radius of about 1 nm to about 2000 nm.
17. The method of claim 16, wherein said nanoparticle has a radius of about 10 nm to about 200 nm.
18. The method of claim 14, wherein said headgroup is a thiol or a disulfide.
19. The method of claim 14, wherein said functional group is hydroxyl, methyl, ether, amine, andor carboxylic acid.
20. The method of claim 14, wherein said body is oligoethylene glycol (OEG), polyethylene glycol (PEG), fluorocarbon, andor hydrocarbon.
21. The method of claim 20, wherein said body has between 3 and 10,000 repeat units.
22. The method of claim 14, wherein said coating material is (E)-PEG350-4-cyano-4-((E)-((R)-2-cyano-5-(6-mercaptohexylthio)-5-oxopenta-n-2-yl)diazenyl)pentanoic acid, (E)-PEG750-4-cyano-4-((E)-((R)-2-cyano-5-(6-mercaptohexylthio)-5-oxopenta-n-2-yl)diazenyl)pentanoic acid or (E)-PEG2000-4-cyano-4-((E)-((R)-2-cyano-5-(6-mercaptohexylthio)-5-oxopenta-n-2-yl)diazenyl)pentanoic acid, or a chemically similar coating material.
23. A coating material used to enable the reversible aggregationdeaggregation of nanoparticles, comprising:
a headgroup used to anchor the coating molecules on the surface of the nanoparticle;
a bio-inert terminal functional group used to stabilize the nanoparticle by steric hindrance; and
a variable length body of the coating material the connects the headgroup to a bio-inert terminal functional group andor a recognition moiety, said moiety located near the terminal functional group, wherein the body contains a radical initiator.
24. The coating material of claim 23, wherein said headgroup is a thiol or a disulfide, or chemically similar ligand.
25. The coating material of claim 23, wherein said functional group hydroxyl, methyl, ether, amine, andor carboxylic acid.
26. The coating material of claim 23, wherein said body is oligoethylene glycol (OEG), polyethylene glycol (PEG), fluorocarbon, andor hydrocarbon.
27. The coating material of claim 26, wherein said coating material is (E)-PEG350-4-cyano-4-((E)-((R)-2-cyano-5-(6-mercaptohexylthio)-5-oxopenta-n-2-yl)diazenyl)pentanoic acid, (E)-PEG750-4-cyano-4-((E)-((R)-2-cyano-5-(6-mercaptohexylthio)-5-oxopenta-n-2-yl)diazenyl)pentanoic acid or (E)-PEG2000-4-cyano-4-((E)-((R)-2-cyano-5-(6-mercaptohexylthio)-5-oxopenta-n-2-yl)diazenyl)pentanoic acid, or a chemically similar coating material.
28. The coating material of claim 23, wherein said body has between 3 and 10,000 repeat units.