1. A method for transferring data from a source target to a destination target in a network-on-a-chip (NoC), the method comprising:
sending at least one request packet to the destination target, the at least one request packet comprising an indication of a first address where the data is located, a second address where the data is to be stored, a size of the data to be transferred, and a number of data transfers;
sending at least one transaction request packet from the destination target to the source target, the at least one transaction request packet being based upon information contained in the at least one request packet; and causing the source target to transfer the data located at the first address to the second address in packets having sizes determined based upon the number of data transfers and the size of the data to be transferred.
2. The method according to claim 1, wherein the at least one request packet further comprises a field having information to identify a method for transferring the data.
3. The method according to claim 2, wherein the field comprises a header field.
4. The method according to claim 3, wherein the header field further comprises information relating to the second address.
5. The method according to claim 4, wherein the at least, one request packet further comprises a payload including information relating to the first address.
6. The method according to claim 5, wherein the payload further comprises information relating to the size of the data to be transferred.
7. The method according to claim 6, wherein the payload further comprises information relating to the number of data transfers.
8. The method according to claim 7, further comprising:
checking the information to identify the method for transferring the data;
retrieving, from the header field, the second address;
storing the second address in a memory; and
retrieving, from the payload, the first address, the number of data transfers and the size of the data to be transferred.
9. The method according to claim 8, further comprising storing, in the memory, request packets each specifying at least one address where a set of data is to be retrieved.
10. The method according to claim 9, further comprising incrementally sending the at least one transaction request packet from a first network interface connected to the destination target to a second network interface connected to the source target.
11. The method according to claim 1, further comprising retrieving a location of the source target from a look-up table for decoding the first address.
12. The method according to claim 1, wherein the sending at least one request packet, sending at least one transaction request packet, and causing the source target to transfer the data are all performed in the network-on-a-chip (NoC).
13. A method for transferring data from a source target to a destination target in a network-on-a-chip, the method comprising:
sending at least one request packet to the destination target, the at least one request packet comprising an indication of a number of data transfers and a size of the data to be transferred;
sending at least one transaction request packet from the destination target to the source target, the at least one transaction request packet being based upon information contained in the at least one request packet; and
causing the source target to transfer the data to the destination target in packets having sizes determined based upon the number of data transfers and the size of the data to be transferred.
14. The method according to claim 13, wherein the at least one request packet further comprises a field having information to identify a method for transferring the data.
15. The method according to claim 14, wherein the field comprises a header field.
16. A network interface device to provide communication between a source target and a destination target in a network-on-a-chip (NoC), the device comprising:
circuitry for retrieving at least one request packet comprising an indication of a first address where data is located, a second address where the data is to be stored, a size of the data to be transferred, and a number of data transfers;
circuitry for sending at least one transaction request packet from the destination target to the source target, the at least one transaction request packet being based upon information contained in the at least one request packet; and
circuitry for causing the source target to transfer the data located at the first address to the second address in packets having a size based upon the number of data transfers and the size of the data to be transferred.
17. The device according to claim 16, wherein the at least one request packet further comprises a header field having information to identify a method for transferring the data and information relating to the second address.
18. The device according to claim 17, wherein the at least one request packet further comprises a payload including information relating to the first address, the size of the data to be transferred, and number of data transfers.
19. The device according to claim 18, wherein the circuitry for retrieving retrieves from the header the second address and retrieves from the payload the first address.
20. The device according to claim 18, wherein the circuitry for retrieving retrieves from the payload the size of a data transfer and the number of data transfers.
21. The device according to claim 18, further comprising a memory to store transaction request packets; and wherein the circuitry for sending incrementally sends the transaction request packets to the source target.
22. The device according to claim 21, further comprising a second memory to store transmitted data.
23. The device according to claim 16, further comprising a first part to perform data protocol conversion and a second part to perform protocol independent data processing.
24. The device according to claim 23, wherein the first and second part each comprise an input control block to extract request data in a first format from incoming request packets and store the extracted request data in the second memory, and an output control block to read contents from the second memory and generate data signals, based upon the contents read from the second memory, in a second format.
25. The device according to claim 24, further comprising circuitry to synchronize the input and output control blocks.
26. An integrated circuit comprising:
a source target;
a destination target;
circuitry for sending at least one request packet to the destination target, the at least one request packet comprising an indication of a first address where data is located, a second address where the data is to be stored, a size of the data to be transferred, and a number of data transfers;
circuitry for sending at least one transaction request packet from the destination target to the source target, the at least one transaction request packet being based upon information contained in the at least one request packet; and
circuitry for transferring the data located at the first address to the second address in packets having sizes determined based upon the number of data transfers and the size of the data to be transferred.
27. The integrated circuit according to claim 26, wherein the at least one request packet further comprises a header field having information to identify a method for transferring the data and information relating to the second address.
28. The integrated circuit according to claim 27, wherein the at least one request packet further comprises a payload including information relating to the first address, the size of the data to be transferred, and a number of data transfers.
29. The integrated circuit according to claim 28, wherein the circuitry for retrieving retrieves from the header the second address and retrieves from the payload the first address.
30. The integrated circuit according to claim 28, wherein the circuitry for retrieving retrieves from the payload the size of a data transfer and the number of data transfers.
31. The integrated circuit according to claim 28, further comprising a memory to store transaction request packets; and wherein the circuitry for sending incrementally sends the transaction request packets.
32. The integrated circuit according to claim 31, further comprising a second memory to store transmitted data.
33. The integrated circuit according to claim 26, further comprising a first part to perform data protocol conversion and-a second part to perform protocol independent data processing.
34. The integrated circuit according to claim 33, wherein the first and second part each comprise an input control block to extract request data in a first format from incoming request packets and store the extracted request data in the second memory, and an output control block to read contents from the second memory and generate data signals, based upon the contents read from the second memory, in a second format.
35. The integrated circuit according to claim 34, further comprising circuitry to synchronize the input and output control blocks.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A tool belt comprising:
(a) a girdle;
(b) a pocket system supported by said girdle, wherein said pocket system includes a first pocket and a second pocket;
(c) said first pocket includes a first spring frame integrated therewith that includes a first position that closes a top portion of said first pocket and a second position that opens a top portion of said first pocket;
(d) said second pocket includes a second spring frame integrated therewith that includes a first position that closes a top portion of said second pocket and a second position that opens a top portion of said second pocket;
(e) said first pocket is attached to and supported by said girdle;
(f) said second pocket is attached to and supported by said first pocket at a location further distant from said girdle than said first pocket.
2. The tool belt of claim 1 further comprising said girdle supported by said tool belt that includes a first outer end and a second outer end.
3. The tool belt of claim 2 wherein said ends are overlapping with one another and include a securement mechanism to secure said first out end and said second outer end to one another.
4. The tool belt of claim 3 wherein said girdle includes a lateral height which varies around the linear run of said girdle.
5. The tool belt of claim 4 wherein a center region of said girdle has a substantially greater said lateral height than said lateral height at either portions of said first outer end and said second outer end.
6. The tool belt of claim 5 wherein said girdle includes at least two layers thereof with stitching about the outer periphery of the said girdle.
7. The tool belt of claim 6 further comprising a plurality of spaced apart open loops on the exterior surface thereof.
8. The tool belt of claim 7 wherein the interior surface of said girdle is substantially smooth.
9. The tool belt of claim 8 further comprising a strap extending through said open loops that includes a fastening device to secure a first end of said strap to a second end of said strap.
10. The tool belt of claim 9 wherein said strap has a lateral height that is less than said later height of said girdle.
11. The tool belt of claim 1 wherein said first spring frame includes a pair of opposing sides that are substantially linear and parallel with one another.
12. The tool belt of claim 11 wherein said first spring frame includes a two pairs of curved portions that are substantially linear and parallel with one another when said first spring frame is in said first position.
13. The tool belt of claim 12 wherein said two pairs of curved portions are interconnected to said pair of opposing sides with a pair of springs.
14. The tool belt of claim 13 wherein said pair of opposing sides maintains said second position without further interaction.
15. The tool belt of claim 14 wherein said pair of opposing sides are wrapped in a protective layer.
16. The tool belt of claim 13 wherein said first spring frame is said affixed to said girdle with a plate and studs.