What is claimed is:
1. A method of synthesizing a polynucleotide, comprising:
(a) coupling a second nucleoside to a first nucleoside through a phosphite linkage, wherein the second nucleoside has a non-carbonate protecting group protecting a hydroxyl; and
(b) exposing the product of step (a) to a composition which concurrently oxidizes the phosphite formed in step (a) to a phosphate and deprotects the protected hydroxyl of the second nucleoside.
2. A method according to claim 1 wherein the second nucleoside is a phosphoramidite and wherein steps (a) and (b) are repeated and the hydroxyl deprotected in a first iteration of step (b) reacts to form the phosphite linkage with the second nucleoside in the next iteration of step (a).
3. A method according to claim 1 wherein the non-carbonate protecting group is an acid labile protecting group and the composition comprises an acid to remove the non-carbonate protecting group.
4. A method according to claim 1 wherein the composition comprises a solution with a solvent which is primarily non-aqueous.
5. A method according to claim 4 wherein the solution is anhydrous.
6. A method according to claim 2 wherein the solution comprises iodine, an oxaziridine or a peroxide as an oxidizing agent.
7. A method according to claim 2 wherein the composition comprises an acetic acid and iodine, an oxaziridine, or an organic peroxide.
8. A method according to claim 1 wherein the non-carbonate protecting group is labile under nucleophilic attack under neutral or mildly basic conditions and the composition comprises a nucleophile that exhibits an alpha effect at neutral to mildly basic pH.
9. The method of claim 8 wherein the nucleophile is an inorganic peroxide of the formula MOOH, wherein M is a counterion selected from the group consisting of H, Li, Na, K, Rband Cs.
10. The method of claim 8, wherein the nucleophile is an organic peroxide of the formula (V), (VI) or (VII),
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in which R4 through R10 are hydrocarbyl optionally substituted with one or more nonhydrocarbyl substituents and optionally containing one or more nonhydrocarbyl linkages.
11. The method of claim 8 wherein the nucleophile is one of t-butyl hydroperoxide or m-chloroperoxybenzoic acid, or mixtures thereof.
12. A method of fabricating an addressable array of polynucleotides on a substrate carrying substrate bound moieties each with a hydroxyl group, comprising, at each of multiple different substrate addresses:
(a) coupling a nucleoside to a second nucleoside through a phosphite linkage, wherein the coupled nucleoside has a non-carbonate protecting group protecting a hydroxyl; and
(b) exposing the product of step (a) to a composition which both oxidizes the phosphite formed in step (a) to a phosphate and deprotects the protected hydroxyl of the coupled nucleoside;
(c) repeating steps (a) and (b) wherein the deprotected hydroxyl of the coupled nucleoside in one cycle of the steps serves as the hydroxyl group of substrate bound moieties in the next cycle, so as to form the addressable array with different polynucleotide sequences at different addresses.
13. A method according to claim 12 wherein in step (a) the nucleosides to be coupled at respective addresses are deposited as droplets at those addresses.
14. A method according to claim 12 wherein in step (b) all of the substrate is simultaneously exposed to the composition.
15. A method according to claim 12 wherein the second nucleoside is a phosphoramidite.
16. A method according to claim 12 wherein the non-carbonate protecting group is an acid labile protecting group and the composition comprises an acid to remove the non-carbonate protecting group.
17. A method according to claim 16 wherein the composition comprises an acetic acid and iodine or an organic peroxide in a solvent which is primarily non-aqueous.
18. A method according to claim 17 wherein the composition comprises no more than 5% of the acetic acid and no more than 5% of iodine.
19. A method according to claim 17 wherein the composition comprises no more than 10% di- or tri-chloracetic acid and no more than 5% iodine.
20. A method according to claim 12 wherein the non-carbonate protecting group is labile under nucleophilic attack under neutral or mildly basic conditions and the composition comprises a nucleophile that exhibits an alpha effect at neutral to mildly basic pH.
21. The method of claim 20 wherein the nucleophile is an inorganic peroxide of the formula MOOH, wherein M is a counterion selected from the group consisting of H, Li, Na, K, Rband Cs.
22. The method of claim 20, wherein the nucleophile is an organic peroxide of the formula (V), (VI) or (VII),
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in which R4 through R10 are hydrocarbyl optionally substituted with one or more nonhydrocarbyl substituents and optionally containing one or more nonhydrocarbyl linkages.
23. The method of claim 20 wherein the nucleophile is one of t-butyl hydroperoxide, m-chloroperoxybenzoic acid, or mixtures thereof.
24. A method according to claim 12 wherein the method is executed at each of at least 1000 addresses.
25. A method for making an oligonucleotide array made up of array features each presenting a specified oligonucleotide sequence at an address on an array substrate, the method comprising steps of:
providing a hydroxyl-derivatized array substrate and treating the array substrate to protect hydroxyl moieties on the derivatized surface from reaction with phosphoramidites,
then iteratively carrying out the steps of (i) applying droplets of an alpha effect nucleophile to effect deprotection of hydroxyl moieties at selected addresses, and (ii) flooding the array substrate with a medium containing a selected monomeric nucleoside phosphoramidite having a carbonate-protected hydroxyl group, to permit covalent attachment of the selected nucleoside to the deprotected hydroxyl moieties at the selected addresses.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A data writing apparatus for writing main data and parity data used for error correction of the main data, to a storage apparatus, the data writing apparatus comprising:
a writing circuit for writing the main data and the parity data to the storage apparatus;
a parity generation circuit for generating the parity data in parallel with writing of the main data; and
a timing adjustment circuit for performing adjustment so that a head of the generated parity data appears after a tail-end of the main data, consecutively, as regards timing of writing; wherein
the main data and the parity data, whose timing is adjusted by the timing adjustment circuit, are provided to the writing circuit.
2. A data writing apparatus according to claim 1, wherein the parity generation circuit comprises:
an interleaving circuit for sorting an order of the main data in accordance with a prescribed rule;
a low density parity check encoding circuit for performing low density parity check encoding on data sorted by the interleaving circuit, and for generating encoded data; and
a de-interleaving circuit for returning an order of the encoded data generated by the low density parity check encoding circuit, to an original form, and for outputting the parity data.
3. A data writing apparatus according to claim 1, wherein the timing adjustment circuit is arranged in a propagation path of the main data so as to cancel out delay time in the parity generation circuit.
4. A data writing apparatus according to claim 1, wherein the timing adjustment circuit delays the main data, with, as a delay amount, a value obtained by subtracting, from time required for generation of the parity data in the parity generation circuit, time required for supplying data from the head to the tail-end of the main data, to the writing circuit.
5. A data writing apparatus according to claim 4, wherein the timing adjustment circuit comprises: a delay amount determining unit for determining a delay amount, and, using the delay amount supplied from the delay amount determining unit, delays and outputs the main data inputted to the timing adjustment circuit.
6. A data writing apparatus according to claim 4, wherein the timing adjustment circuit comprises a number of delay elements, the number corresponding to the delay amount, and a delay element thereof delays, by the delay amount only, and outputs the main data inputted to the delay element.
7. A data writing apparatus according to claim 4, wherein the timing adjustment circuit comprises:
a delay amount determining unit for determining the delay amount; and
a plurality of delay elements to which the main data is inputted, delayed, and outputted; wherein,
based on the delay amount determined by the delay amount determining unit, any delay element among the plurality of delay elements is selected, and the main data is outputted from the selected delay element, sequentially to the writing circuit.
8. A data writing apparatus according to claim 7, wherein the plurality of delay elements comprise at least more delay amounts than the delay amount.
9. A data writing apparatus according to claim 1, wherein the storage apparatus is a magnetic storage apparatus built-in in a computer; the parity generation circuit generates the parity data for the main data generated inside the computer; and the writing circuit writes the main data and the parity data sequentially to the magnetic storage apparatus.
10. A storage system, having a signal storage system comprising a write channel for writing data to a storage apparatus, and a read channel for reading data stored in the storage apparatus, wherein
the write channel comprises:
a first encoder for run-length encoding of data;
a second encoder for encoding data encoded by the first encoder, using a low density parity check code; and
a data writing unit for writing the data encoded by the second encoder, to the storage apparatus;
the read channel comprises:
a data reading unit for reading the data stored in the storage apparatus;
a soft output detection unit for calculating likelihood for the data read by the data reading unit and outputting a soft decision value;
a first decoder, corresponding to the second encoder, for decoding data outputted from the soft output detection unit; and
a second decoder, corresponding to the first encoder, for decoding the data decoded by the first decoder; and
the data writing unit comprises:
a writing circuit for writing data encoded by the first encoder and parity data to the storage apparatus;
a parity generation circuit for generating the parity data in parallel with writing the data encoded by the first encoder; and
a timing adjustment circuit for performing an adjustment so that a head of the generated parity data appears after a tail-end of the main data, consecutively, as regards timing of writing; wherein
the main data and the parity data, whose timing is adjusted by the timing adjustment circuit, are provided to the writing circuit.
11. A data writing apparatus according to claim 1, wherein the apparatus is integrated on one semiconductor board.