1. A method for communication between a first storage controller and a second storage controller wherein the first and second storage controllers are communicatively coupled through a communication medium and protocol, the method comprising:
specifying a special frame indicator in a frame of the protocol, wherein the communication medium and protocol is also used by the first storage controller to send a storage command to a storage device;
transmitting the frame from the first storage controller to the second storage controller, wherein the frame comprises data in a payload field of the frame;
checking, at the first storage controller, a number of transmitted frames against a max frames value; and
waiting, when the number of transmitted frames reaches the max frames values, until a number of acknowledgments balances with the number of transmitted frames in a state machine.
2. A method for communication between a first storage controller and a second storage controller wherein the first and second storage controllers are communicatively coupled through a communication medium and protocol, the method comprising:
specifying a special frame indicator in a frame of the protocol, wherein the communication medium and protocol is also used by the first storage controller to send a storage command to a storage device;
transmitting the frame from the first storage controller to the second storage controller, wherein the frame comprises data in a payload field of the frame;
verifying, at the second storage controller, that the second storage controller accepts the frame; and
checking, at the second storage controller, an identification associated with the first storage controller against an authenticated identification.
3. A method for communication between a first storage controller and a second storage controller wherein the first and second storage controllers are communicatively coupled through a communication medium and protocol, the method comprising:
specifying a special frame indicator in a frame of the protocol, wherein the communication medium and protocol is also used by the first storage controller to send a storage command to a storage device;
transmitting the frame from the first storage controller to the second storage controller, wherein the frame comprises data in a payload field of the frame;
generating, at the second storage controller, a memory address to write the data, further comprising:
concatenating an upper portion of a memory address from a first field of the frame with a lower 32-bit portion of the memory address from a second field of the frame to produce a concatenated address;
applying a mask to the concatenated address to produce an offset; and
adding the offset to a base memory address.
4. A storage system for supporting communication between a first storage controller and a second storage controller, the storage system comprising:
the first storage controller;
the second storage controller;
a storage device; and
a communication medium coupling the first storage controller with the second storage controller and coupling the first storage controller with the storage device wherein the communication medium is used in accordance with a protocol,
wherein the first storage controller comprises:
a specifying element for specifying a special frame indicator in a frame of the protocol, wherein the protocol is also used by the first storage controller to send a storage command to the storage device; and
a transmitting element for transmitting the frame from the first storage controller to the second storage controller, wherein the frame comprises data in a payload field of the frame,
wherein the first storage controller further comprises:
a checking element for checking a number of transmitted frames against a max frames value;
a waiting element for waiting, when the number of transmitted frames reaches the max frames values, until a number of acknowledgments balances with the number of transmitted frames in a state machine.
5. A storage system for supporting communication between a first storage controller and a second storage controller, the storage system comprising:
the first storage controller;
the second storage controller;
a storage device; and
a communication medium coupling the first storage controller with the second storage controller and coupling the first storage controller with the storage device wherein the communication medium is used in accordance with a protocol,
wherein the first storage controller comprises:
a specifying element for specifying a special frame indicator in a frame of the protocol, wherein the protocol is also used by the first storage controller to send a storage command to the storage device; and
a transmitting element for transmitting the frame from the first storage controller to the second storage controller, wherein the frame comprises data in a payload field of the frame,
wherein the second storage controller comprises:
a verifying element for verifying that the second storage controller accepts the frame; and
a checking element for checking an identification associated with the first storage controller against an authenticated identification.
6. A storage system for supporting communication between a first storage controller and a second storage controller, the storage system comprising:
the first storage controller;
the second storage controller;
a storage device; and
a communication medium coupling the first storage controller with the second storage controller and coupling the first storage controller with the storage device wherein the communication medium is used in accordance with a protocol,
wherein the first storage controller comprises:
a specifying element for specifying a special frame indicator in a frame of the protocol, wherein the protocol is also used by the first storage controller to send a storage command to the storage device; and
a transmitting element for transmitting the frame from the first storage controller to the second storage controller, wherein the frame comprises data in a payload field of the frame,
wherein the second storage controller comprises:
a generating element for generating a memory address to write the data, further comprising:
a concatenating element for concatenating an upper portion of a memory address from a first field of the frame with a lower 32-bit portion of the memory address from a second field of the frame to produce a concatenated address;
an applying element for applying a mask to the concatenated address to produce an offset; and
an adding element for adding the offset to a base memory address.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A CMOS structure comprising:
an n-FET device and a p-FET device located within and upon a substrate, where:
the n-FET device has a first channel comprising a first silicon material layer located upon a silicon-germanium alloy material layer; and
the p-FET device has a second channel comprising a second silicon material layer located upon a silicon-germanium-carbon alloy material layer.
2. The CMOS structure of claim 1 wherein the substrate comprises a bulk semiconductor substrate.
3. The CMOS structure of claim 1 wherein the substrate comprises a semiconductor-on-insulator substrate.
4. The CMOS structure of claim 1 wherein each of the first silicon material layer and the second silicon material layer has a thickness from about 50 to about 1000 angstroms.
5. The CMOS structure of claim 1 wherein each of the silicon-germanium alloy material layer and the silicon-germanium-carbon alloy material layer has a thickness from about 50 to about 1000 angstroms.
6. The CMOS structure of claim 1 wherein the silicon-germanium-carbon alloy material layer has a carbon content from about 0.5 to about 3 atomic percent.
7. The CMOS structure of claim 1 wherein each of the silicon-germanium alloy material layer and the silicon-germanium-carbon alloy material layer has a germanium content from about 5 to about 50 atomic percent.
8. The CMOS structure of claim 1 further comprising a first source and drain region located adjoining the first channel and a second source and drain region located adjoining the second channel.
9. The CMOS structure of claim 8 wherein the first source and drain region comprises a silicon material and the second source and drain region comprises a silicon-germanium alloy material.
10. The CMOS structure of claim 8 wherein both the first source and drain region and the second source and drain region comprise only one of a silicon material and a silicon-germanium alloy material.
11. A method for fabricating a CMOS structure comprising:
forming over a substrate:
a first region comprising a first silicon material layer located upon a silicon-germanium alloy material layer, the first region being laterally separated from a second region comprising a second silicon material layer located upon a silicon-germanium-carbon alloy material layer also formed over the substrate; and
forming over the substrate n-FET that uses the first region as a first channel and a p-FET that uses the second region as a second channel.
12. The method of claim 11 wherein the forming over the substrate uses a bulk semiconductor substrate.
13. The method of claim 11 wherein the forming over the substrate uses a semiconductor-on-insulator substrate.
14. The method of claim 11 further comprising:
forming a silicon material layer adjoining the first channel; and
forming a silicon-germanium alloy material layer adjoining the second channel
15. The method of claim 11 further comprising forming only one of a silicon material layer and a silicon-germanium alloy material layer adjoining both the first channel and the second channel.
16. A method for fabricating a CMOS structure comprising:
forming a silicon-germanium alloy material layer over a substrate;
incorporating carbon selectively into the silicon-germanium alloy material layer to form a silicon-germanium alloy material sub-layer laterally adjacent a silicon-germanium-carbon alloy material sub-layer over the substrate;
forming a first silicon material sub-layer upon the silicon-germanium material sub-layer and a second silicon material sub-layer upon the laterally adjacent silicon-germanium-carbon alloy material layer;
forming an n-FET using the first silicon material sub-layer and the silicon-germanium alloy material sub-layer as a channel; and
forming a p-FET using the second silicon material sub-layer and the silicon-germanium-carbon alloy material sub-layer as a channel.
17. The method of claim 16 wherein the forming the silicon-germanium alloy material layer over the substrate uses a bulk semiconductor substrate.
18. The method of claim 16 wherein the forming the silicon-germanium alloy material layer over the substrate uses a semiconductor-on-insulator substrate.
19. The method of claim 16 wherein the incorporating carbon selectively uses an ion implantation method.
20. The method of claim 16 wherein the incorporating carbon selectively uses a diffusion method.