1. A solenoid valve provided with:
a substantially cylindrical coil adapted to generate a magnetic field when it is energized,
a center post provided concentrically with the cylindrical coil,
a plunger adapted to be magnetically attracted to the center post by a magnetic field generated by the coil,
a substantially bottomed cylindrical metal sleeve provided so as to cover an outer circumferential surface of the center post and plunger,
a metal plate provided in the vicinity of an opening end of the sleeve and having a substantially flat surface portion extending to radial direction, and
a metal case member containing the coil, center post, plunger, sleeve and plate, the solenoid valve comprising
a collar provided on the sleeve and extending toward an inner circumferential surface of the case member,
an annular space formed among one surface of the collar, an inner circumferential surface of the case member and a substantially flat surface portion of the plate, and
a seal member provided in the space and adapted to seal each of one surface of the collar, the inner circumferential surface of the case member and the substantially flat surface portion of the plate.
2. A solenoid valve according to claim 1, wherein the annular space is formed to a substantially cylindrical shape by the outer circumferential surface formed by extending the collar in the direction separating from the plate, and the substantially flat surface portion formed by bending the end portion of this outer circumferential surface toward the inner circumferential surface of the case member,
the seal member being provided with:
a seal portion which forms a first seal surface with the substantially flat surface portion of the plate,
a contact portion contacting the substantially flat surface portion of the collar, and
a position restricting portion adapted to be brought into contact with the outer circumferential surface portion of the collar and restricting a radial inward movement,
at least either one of the seal portion and contact portion being rendered flexibly deformable toward the inner circumferential surface of the case member, and forming a second seal surface with the inner circumferential surface of the case member,
a third seal surface being formed between at least either one of the contact portion and position restricting portion and the collar.
3. A solenoid valve according to claim 1, wherein the annular space is formed to a substantially triangular cross-sectional shape by inclining the collar so that the collar becomes distant from the plate from a position in which the collar contacts the plate toward the inner circumferential surface of the case member,
the seal member being made of an O-ring adapted to seal each of the inclined surface of the collar, the inner circumferential surface of the case member and the substantially flat surface portion of the plate.
4. A solenoid valve according to claim 1, wherein at least a part of the collar is made of an elastic material capable of being elastically deformed,
the collar being disposed so that the seal member is pressed by an elastic resilience of the collar.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A pulser logic method for an ultrasound beamformer, comprising the steps of:
accessing digital logic memory blocks to establish a transducer element excitation timing sequence;
delivering the transducer element excitation timing sequence to a pulse generator, the pulse generator exciting selective pulsers of a multi-element ultrasound array transducer according to the excitation timing sequence;
using a delay memory block to store delay values in master clock number of cycles needed for each of the pulsers to begin emitting transmit pulses; and
using a pulser trigger memory block having a bit data width corresponding to the number of pulsers in the multi-element ultrasound array transducer, the pulser trigger memory block triggering a corresponding one of the pulsers based on a delay timing associated with the delay memory block;
wherein the multi-element ultrasound array transducer forms a wave front focal point having a steerable position determined by the transducer element excitation timing sequence.
2. The pulser logic method according to claim 1, further comprising the step of providing a memory depth of the pulser trigger memory block, the memory depth being larger than a maximum required delay value for all of the pulsers, the delay value being computed in terms of master clock number of cycles.
3. The pulser logic method according to claim 2, further comprising the step of using a delay memory data bus to form address lines for the pulser trigger memory block.
4. The pulser logic method according to claim 3, further comprising the step of writing data values inside the pulser trigger memory block at each address location, the data values being zeros except for one data value written from an index representing a pulser bit location having a required delay value to start firing transmit (TX) pulses.
5. The pulser logic method according to claim 4, further comprising the step of using a four-bit counter having a clock (CLK) functioning as a delay memory read (CLK); and
reading a new pulser delay value (Pulser Trigger Memory Address) from the delay memory for each new count from the four-bit counter.
6. The pulser logic method according to claim 5, further comprising the step of using a four-bit adder to add an output of the four bit counter to a lowest four bits of a line number of the ultrasound array transducer.
7. The pulser logic method according to claim 6, further comprising the step of outputting a result of the four-bit adder to an input of a four-bit decoder, the four-bit decoder having an output representing the trigger data written to the pulser trigger memory block.
8. The pulser logic method according to claim 7, further comprising the step of emitting a logic value of one after a time=1CLK multiplied by the pulser delay value corresponding to said pulser.
9. The pulser logic method according to claim 8, wherein a number of modules of the pulse generator correspond 1:1 to the number of the pulsers in the ultrasound array.
10. The pulser logic method according to claim 8, wherein for any given module number, positive transmit waveforms and negative transmit waveforms are generated, assuming a predetermined number of pulses and a predetermined pulse width.
11. The pulser logic method according to claim 10, further comprising the steps of:
writing multiple focal zones into the pulser trigger memory block; and
specifying a delay time unique for each of the multiple focal zones.
12. The pulser logic method according to claim 11, further comprising the step of outputting to a multiplexer a first plurality of inputoutput channels formed by the pulser logic method, the multiplexer selecting a second plurality of elements of the multi-element ultrasound array transducer for excitation.
13. The pulser logic method according to claim 12, further comprising the step of changing the select inputs of the multiplexer for every ultrasound line, the multiplexer changing the order of an echo received (RX) from the order of the TX pulses sent.
14. The pulser logic method according to claim 13, further comprising the steps of:
summing in a constructive interference the ultrasound echo lines; and
changing the order of the delay values sent to the pulser logic, each line matching the order of a line of the RX echo to get the best signal to noise ratio.
15. A pulser logic system for an ultrasound beamformer, comprising:
digital logic memory blocks, wherein the digital logic memory blocks further comprise:
a delay memory block to store delay values in master clock number of cycles needed for each pulser to begin emitting transmit pulses; and
a pulser trigger memory block having a bit data width corresponding to a number of pulsers in the multi-element ultrasound array transduce, the pulser trigger memory block triggering the array transducer pulser based on a delay timing associated with the delay memory block;
means for establishing a transducer element excitation timing sequence;
a transmitreceive (TR) switch;
a plurality of pulser drivers;
a multi-element ultrasound array transducer having n pulser elements; and
means for delivering the transducer element excitation timing sequence to the plurality of pulser drivers, the pulser drivers exciting selective pulser elements of the multi-element ultrasound array transducer according to the excitation timing sequence;
wherein the multi-element ultrasound array transducer forms a wave front focal point having a steerable position determined by the transducer element excitation timing sequence.
16. The pulser logic system according to claim 15, further comprising:
a connection of the pulser drivers to the TR switch;
a plurality of echo amplifiers connected to the TR switch; and
a multiplexer having m select input lines, output of the TR switch being connected to the m select channel lines of the multiplexer, output of the multiplexer being connected to the pulser elements, the multiplexer changing the order of an echo received (RX) from the order of the TX pulses sent.
17. The pulser logic system according to claim 16, wherein the number of pulser elements n is greater than the m number of select channel lines, the multiplexer selecting m elements from the n probe elements in each line and then receiving the echo from these m elements and sending the received echo to the echo amplifiers.
18. The pulser logic system according to claim 15, wherein the digital logic memory blocks are formed from a field-programmable gate array (FPGA).