We claim:
1. An information recording medium on which information is recorded in a recording area by means of energy beam irradiation, comprising:
a pattern of a dummy signal added to at least one of the leading and trailing sides of the recording signal which is recorded in the recording area.
2. An information recording medium as claimed in claim 1, wherein a postamble is added between user data and the trailing side dummy signal.
3. An information recording medium as claimed in claim 1, wherein said recording medium has a phase change recording film.
4. An information recording medium as claimed in claim 3, wherein said recording film is one of a GeSbTe system and a AgInSbTe system.
5. An information recording medium as claimed in claim 4, wherein said recording film contains a high-melting point material selected from one of CrTe and AgTe.
6. An information recording medium as claimed in claim 1, wherein, in order, a protective layer, a recording layer, a protective layer, a first reflective layer and a second reflective layer are stacked on a substrate.
7. An information recording medium as claimed in claim 1, wherein information concerning the pattern of the dummy signal is recorded in a control data area on the recording medium.
8. An information recording medium as claimed in claim 7, wherein an information on a pattern of the dummy signal in which the average recording mark length is shorter than the average space length between recording marks is written in the control data area.
9. An information recording medium as claimed in claim 7, wherein an information on the pattern of a single-frequency dummy signal is written in a control data area.
10. An information recording medium on which information is recorded in a recording area by means of energy beam irradiation, comprising:
a dummy area in which information to be recorded by a dummy signal is added to at least one of the leading and trailing sides in the recording area in which an information signal is recorded on the recording medium.
11. An information recording method in which information is recorded on a recording medium by means of energy beam irradiation, comprising recording with an energy beam a dummy signal added to at least one of the leading and trailing sides in the recording signal.
12. An information recording method as claimed in claim 11, further comprising using a laser for said recording of said dummy signal, wherein an average energy of the laser beam during dummy signal recording is lower than an average energy used to record user data signal.
13. An information recording method as claimed in claim 11, further comprising using a laser for said recording of said dummy signal, wherein in said recording, the dummy signal is recorded with a single-frequency and wherein the average energy of the laser beam for said recording of said dummy signal is set lower than an average energy used to record user data signal by adjusting the duty ratio of the dummy signal.
14. An information recording method as claimed in claim 13, wherein the average energy of the laser beam during dummy signal recording is decreased stepwise or linearly by adjusting the duty ratio of the dummy signal stepwise or linearly.
15. An information recording method as claimed in claim 11, wherein a position where the recording of the signal including the dummy signal starts is shifted at random.
16. An information recording method. as claimed in claim 15, wherein the maximum shift width of the recording start position is shorter than the length of the dummy signal.
17. An information recording method as claimed in claim 16, wherein the maximum shift width of the recording start position is in a range of about {fraction (120)}- of the length of the dummy signal.
18. An information recording apparatus for recording information by means of energy beam irradiation, comprising:
a laser beam source, an optical system, automatic focusing (AF) means, tracking means, a recording medium on which information is recorded in single or plurality of recording area by means of the laser beam, means for rotating the recording medium, means for condensing the laser beam from the laser beam source on the recording medium, signal modulating means for converting a signal to be recorded into a modulation code, means for adding a dummy signal or dummy signals to at least one of leading and trailing sides in the recording signal, recording waveform generation means for generating a recording waveform corresponding to a recording signal, recording start position control means for shifting a recording start position at random, laser driving means for driving the laser beam source in accordance with the recording waveform, means for converting the intensity change of the laser beam reflected from the recording medium into an electrical signal, means for amplifying the reproduced electrical signal, conversion-to-binary means for converting the electrical signal into a binary waveform, means for decoding the binary signal to make the decoded signal, means for reading a preformatted header signal, means for deleting the dummy signal, means for finding control data from said decoded signal, means for pick up user data from the decoded signal, means for extracting information on the dummy data pattern, means for generating dummy data, and means for storing the dummy data pattern.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A semiconductor device comprising:
a semiconductor chip;
an alignment mark which is formed by part of an uppermost interconnection layer in a multilevel interconnection that is formed on the semiconductor chip and obtained by stacking low-permittivity insulating layers and interconnection layers, the alignment mark being arranged adjacent to each corner of the semiconductor chip; and
a conductive member which is buried in a contact hole formed in the low-permittivity insulating layer below the alignment mark, and contacts the alignment mark.
2. A device according to claim 1, wherein
the conductive member includes plugs which are buried in contact holes formed in the respective insulating layers in the multilevel interconnection, and
the alignment mark contacts a surface of the semiconductor chip via the plugs.
3. A device according to claim 1, which further comprises an element formed in the semiconductor chip, and
in which the alignment mark is electrically connected to the element.
4. A device according to claim 1, wherein the conductive member is formed by part of an interconnection layer in the multilevel interconnection.
5. A device according to claim 1, further comprising a barrier film which is interposed between a low-permittivity insulating layer and an interconnection layer in the multilevel interconnection, and prevents oxidization and diffusion of the interconnection layer.
6. A device according to claim 5, wherein the barrier film includes an SiCN film.
7. A device according to claim 1, wherein the low-permittivity insulating layer has a relative dielectric constant of 3.0 to 2.5.
8. A device according to claim 1, wherein the alignment mark has a width of not less than 10 \u03bcm.
9. A semiconductor device comprising:
a semiconductor chip;
a guard ring which is formed by part of an uppermost interconnection layer in a multilevel interconnection that is formed on the semiconductor chip and obtained by stacking low-permittivity insulating layers and interconnection layers, the guard ring being arranged adjacent to each corner of the semiconductor chip; and
a conductive member which is buried in a contact hole formed in the low-permittivity insulating layer below the guard ring, and contacts the guard ring.
10. A device according to claim 9, wherein the guard ring is arranged along four sides of the semiconductor chip.
11. A device according to claim 9, wherein
the conductive member includes plugs which are buried in contact holes formed in the respective insulating layers in the multilevel interconnection, and
the guard ring contacts a surface of the semiconductor chip via the plugs.
12. A device according to claim 9, wherein the conductive member is formed by part of an interconnection layer in the multilevel interconnection.
13. A device according to claim 9, further comprising a barrier film which is interposed between a low-permittivity insulating layer and an interconnection layer in the multilevel interconnection, and prevents oxidization and diffusion of the interconnection layer.
14. A device according to claim 13, wherein the barrier film includes an SiCN film.
15. A device according to claim 9, wherein the low-permittivity insulating layer has a relative dielectric constant of 3.0 to 2.5.
16. A device according to claim 9, wherein the guard ring has a width of not less than 10 \u03bcm.
17. A semiconductor device comprising:
a semiconductor chip;
a guard ring which is formed by part of an uppermost interconnection layer in a multilevel interconnection that is formed on the semiconductor chip and obtained by stacking low-permittivity insulating layers and interconnection layers, the guard ring being arranged adjacent to each corner of the semiconductor chip;
a first conductive member which is buried in a first contact hole formed in the low-permittivity insulating layer below the guard ring, and contacts the guard ring;
an alignment mark which is formed by part of the uppermost interconnection layer in the multilevel interconnection, and arranged near at least one corner of the semiconductor chip; and
a second conductive member which is buried in a second contact hole formed in the low-permittivity insulating layer below the alignment mark, and contacts the alignment mark.
18. A device according to claim 17, wherein
the first conductive member includes first plugs which are buried in contact holes formed in the respective insulating layers in the multilevel interconnection, and
the guard ring contacts a surface of the semiconductor chip via the first plugs.
19. A device according to claim 17, wherein
the second conductive member includes second plugs which are buried in contact holes formed in the respective insulating layers in the multilevel interconnection, and
the alignment mark contacts a surface of the semiconductor chip via the second plugs.
20. A device according to claim 17, wherein the guard ring is arranged along four sides of the semiconductor chip.