1. A volatile memory device comprising:
a memory cell array including a plurality of word lines, a plurality of bit lines, and a plurality of memory cells connected to the word lines and bit lines;
a command decoder configured to decode a self-refresh entry command, a self-refresh exit command, and a register read command from external command signals received from outside the volatile memory device;
a self-refresh circuit configured to automatically refresh the memory cell array during a self-refresh mode which be entered in response to the self-refresh entry command and be exited in response to the self-refresh exit command; and
a register configured to store an accessible state in response to the self-refresh exit command, and output the stored accessible state in response to the register read command, the accessible state indicating whether or not the memory cell array is ready to be read or written.
2. The volatile memory device of claim 1, wherein the self-refresh circuit is further configured to generate a self-refresh mode signal which is enabled in response to the self-refresh entry command and is disabled in response to the self-refresh exit command, a self-refresh pulse signal which is periodically generated every first time period during an enable period of the self-refresh mode signal, and a self-refresh state signal which is enabled in response to the self-refresh pulse signal and is disabled after a second time period.
3. The volatile memory device of claim 2, wherein the register stores a logic level of the self-refresh state signal at a moment when the self-refresh mode signal is disabled as the accessible state.
4. The volatile memory device of claim 3, wherein the first time period is an average time between refresh commands, and the second time period is a refresh cycle time.
5. The volatile memory device of claim 2, wherein the register comprises a buffer, and
wherein the self-refresh state signal is input into the buffer during an enable period of the self-refresh mode signal, and data stored in the buffer is output in response to the register read command.
6. A memory system comprising:
the volatile memory device of claim 1; and
a memory controller connected to the volatile memory device,
wherein the memory controller is configured to transmit an external command signal corresponding to the self-refresh exit command to the volatile memory device, transmit an external command signal corresponding to the register read command to the volatile memory device, receive data corresponding to the accessible state stored in the register of the volatile memory device from the volatile memory device, and transmit an external command signal corresponding to a valid command with or without an additional delay for a third time period according to a logic level of the received data.
7. The memory system of claim 6, wherein the third time period is a time of a self refresh exit to next valid command delay.
8. The memory system of claim 6, wherein if the logic level of the received data is a first level, the memory controller is further configured to transmit the external command signal corresponding to the valid command after standing by for the third time period after receiving the data.
9. The memory system of claim 8, wherein if the logic level of the received data is a second level different from the first level, the memory controller is further configured to transmits the external command signal corresponding to the valid command immediately after receiving the data.
10. A volatile memory device comprising:
a memory cell array including a plurality of word lines, a plurality of bit lines, and a plurality of memory cells connected to the word lines and bit lines;
a command decoder configured to decode a self-refresh entry command and a self-refresh exit command from external command signals received from outside the volatile memory device;
a self-refresh circuit configured to automatically refresh the memory cell array during a self-refresh mode which be entered in response to the self-refresh entry command and be exited in response to the self-refresh exit command; and
an output buffer configured to output an accessible state in response to the self-refresh exit command, the accessible state indicating whether or not the memory cell array is ready to be read or written.
11. The volatile memory device of claim 10, wherein the self-refresh circuit is further configured to generate a self-refresh mode signal which is enabled in response to the self-refresh entry command and is disabled in response to the self-refresh exit command, a self-refresh pulse signal which is periodically generated every first time period during an enable period of the self-refresh mode signal, and a self-refresh state signal which is enabled in response to the self-refresh pulse signal and is disabled after a second time period.
12. The volatile memory device of claim 11, wherein the output buffer outputs a logic level of the self-refresh state signal at a moment when the self-refresh mode signal is disabled as the accessible state.
13. The volatile memory device of claim 12, wherein the output buffer comprises a buffer having an input terminal and an output terminal, an input switch connected to the input terminal, and an output switch connected to the output terminal, and
wherein the input switch is closed in an enable period of the self-refresh mode signal to store the logic level of the self-refresh state signal in the buffer, and the output switch is closed to output data stored in the buffer in response to the self-refresh exit command.
14. The volatile memory device of claim 11, wherein the output buffer outputs the self-refresh state signal after the self-refresh mode signal is disabled.
15. The volatile memory device of claim 14, wherein the output buffer comprises a buffer having an input terminal and an output terminal and an output switch connected to the output terminal, and
wherein the self-refresh state signal is input to the buffer through the input terminal, and the output switch is closed to output the self-refresh state signal in response to the self-refresh exit command.
16. A memory system comprising:
the volatile memory device of claim 14; and
a memory controller connected to the volatile memory device,
wherein the memory controller is configured to transmit an external command signal corresponding to the self-refresh exit command to the volatile memory device, receive the self-refresh state signal output from the output buffer of the volatile memory device from the volatile memory device, and transmit an external command signal corresponding to a valid command with or without an additional delay for a third time period according to a logic level of the received self-refresh state signal.
17. The memory system of claim 16, wherein if the logic level of the received self-refresh state signal is a first level, the memory controller is further configured to transmit the external command signal corresponding to the valid command after standing by until the received self-refresh state signal transits from the first level to a second level different from the first level, and if the logic level of the received data is the second level, the memory controller is further configured to transmits the external command signal corresponding to the valid command immediately after receiving the self-refresh state signal.
18. A memory system comprising:
the volatile memory device of claim 10; and
a memory controller connected to the volatile memory device,
wherein the memory controller is configured to transmit an external command signal corresponding to the self-refresh exit command to the volatile memory device, receive data corresponding to the accessible state output from the output buffer of the volatile memory device from the volatile memory device, and transmit an external command signal corresponding to a valid command with or without an additional delay according to a logic level of the received data.
19. The memory system of claim 18, wherein if the logic level of the received data is a first level, the memory controller is further configured to transmit the external command signal corresponding to the valid command after standing by for a time of a self refresh exit to next valid command delay after receiving the data.
20. The memory system of claim 19, wherein if the logic level of the received data is a second level different from the first level, the memory controller is further configured to transmits the external command signal corresponding to the valid command immediately after receiving the data.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A mobile station device included in a mobile communication system, the mobile station device comprising:
a receiver configured to receive, on a physical downlink control channel from a base station device, control information having one downlink control information format and being addressed to the mobile station device,
wherein
the one downlink control information format is used for downlink scheduling and a random access order,
in a case that the one downlink control information format is used for the downlink scheduling, the control information provides a downlink resource assignment, and
in a case that the one downlink control information format is used for the random access order, a preset value is set for a field of the downlink resource assignment.
2. The mobile station device according to claim 1, wherein in the case that the control information format is used for the random access order, the control information further provides an identification number specifying a random access preamble.
3. The mobile station device according to claim 2, wherein in the case that the control information format is used for the random access order, the control information further provides a region on a radio frame available for the random access.
4. A base station device included in a mobile communication system, the base station device comprising:
a transmitter configured to transmit, on a physical downlink control channel to a mobile station device, control information having one downlink control information format and being addressed to the mobile station device,
wherein
the one downlink control information format is used for downlink scheduling and a random access order,
in a case that the one downlink control information format is used for the downlink scheduling, the control information provides a downlink resource assignment, and
in a case that the one downlink control information format is used for the random access order, a preset value is set for a field of the downlink resource assignment.
5. The base station device according to claim 4, wherein in the case that the control information format is used for the random access order, the control information further provides an identification number specifying a random access preamble.
6. The base station device according to claim 5, wherein in the case that the control information format is used for the random access order, the control information further provides a region on a radio frame available for the random access.
7. A processing method for a mobile station device included in a mobile communication system, the processing method comprising:
receiving, on a physical downlink control channel from a base station device, control information having one downlink control information format and being addressed to the mobile station device,
wherein
the one downlink control information format is used for downlink scheduling and a random access order,
in a case that the one downlink control information format is used for the downlink scheduling, the control information provides a downlink resource assignment, and
in a case that the one downlink control information format is used for the random access order, a preset value is set for a field of the downlink resource assignment.
8. The processing method according to claim 7, wherein in the case that the control information format is used for the random access order, the control information further provides an identification number specifying a random access preamble.
9. The processing method according to claim 8, wherein in the case that the control information format is used for the random access order, the control information further provides a region on a radio frame available for the random access.
10. A processing method for a base station device included in a mobile communication system, the processing method comprising:
transmitting, on a physical downlink control channel to a mobile station device, control information having one downlink control information format and being addressed to the mobile station device,
wherein
the one downlink control information format is used for downlink scheduling and a random access order,
in a case that the one downlink control information format is used for the downlink scheduling, the control information provides a downlink resource assignment, and
in a case that the one downlink control information format is used for the random access order, a preset value is set for a field of the downlink resource assignment.
11. The processing method according to claim 10, wherein in the case that the control information format is used for the random access order, the control information further provides an identification number specifying a random access preamble.
12. The processing method station according to claim 11, wherein in the case that the control information format is used for the random access order, the control information further provides a region on a radio frame available for the random access.