1. A method for fabricating through-silicon via structure, comprising:
providing a semiconductor substrate;
forming a through-silicon via in the semiconductor substrate;
covering a liner in the through-silicon via;
after performing a baking process on the liner, forming a barrier layer on the liner; and
forming a through-silicon via electrode in the through-silicon via.
2. The method of claim 1, further comprising:
forming a semiconductor device on the semiconductor substrate;
forming a dielectric layer on the semiconductor device; and
forming the through-silicon via in the dielectric layer and the semiconductor substrate.
3. The method of claim 1, further comprising forming the through-silicon via from a front side or a back side of the semiconductor substrate.
4. The method of claim 1, wherein the barrier layer is selected from a group consisting of Ta, TaN, Ti, and TiN.
5. The method of claim 1, further comprising forming a seed layer on the barrier layer after performing the baking process.
6. The method of claim 5, further comprising forming a metal layer on the seed layer after performing the baking process.
7. The method of claim 6, wherein the metal layer comprises copper.
8. The method of claim 6, further comprising performing a planarizing process to partially remove the metal layer, the seed layer, the barrier layer, and the liner after forming the metal layer.
9. The method of claim 8, wherein the planarizing process comprises a chemical mechanical polishing process.
10. The method of claim 2, wherein the semiconductor device comprises a CMOS transistor.
11. A method for fabricating through-silicon via structure, comprising:
providing a semiconductor substrate, wherein the semiconductor substrate comprises at least a semiconductor device thereon;
forming a dielectric layer on the semiconductor device;
forming a through-silicon via in the dielectric layer and the semiconductor substrate;
covering a liner on the sidewall and bottom of the through-silicon via;
after performing a baking process on the liner, forming a barrier layer, a seed layer, and a metal layer on the liner to fill the through-silicon via; and
performing a planarizing process to form a through-silicon via electrode in the through-silicon via.
12. The method of claim 11, wherein the barrier layer is selected from a group consisting of Ta, TaN, Ti, and TiN.
13. The method of claim 11, wherein the metal layer comprises copper.
14. The method of claim 11, wherein the planarizing process comprises a chemical mechanical polishing process.
15. The method of claim 11, wherein the semiconductor device comprises a CMOS transistor.
16. The method of claim 11, further comprising forming the through-silicon via from a front side or a back side of the semiconductor substrate.
17. The method of claim 11, wherein the planarizing process comprises partially removing the metal layer, the seed layer, the barrier layer, and the liner until reaching the dielectric layer.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A computer-implemented method for determining a response attribution value that represents a credit assignment to a communication, for a response received from a recipient during a marketing campaign, the method comprising:
retrieving by one or more computer systems a value for a response rate parameter associated with the communication and a value for a time delay distribution parameter associated with the response received from the recipient;
generating by the one or more computer systems a response attribution value according to the retrieved value for the response rate parameter and the retrieved value for the time delay distribution parameter;
calculating by the one or more computer systems a subsequent value for the response rate parameter; and
calculating by the one or more computer systems a subsequent value for the time delay distribution parameter by applying the generated response attribution value and a time delay distribution to a regression model.
2. The method of claim 1, further comprising:
retrieving by the one or more computer systems the subsequent values for the response rate parameter and the time delay distribution parameter; and
generating by the one or more computer systems a subsequent response attribution value according to the retrieved subsequent value for the response rate parameter and the retrieved subsequent value for the time delay distribution parameter.
3. The method of claim 2, further comprising:
iteratively, retrieving the subsequent values for the response rate parameter and the time delay distribution parameter and generating the subsequent response attribution value according to the retrieved subsequent value of the response rate parameter and the retrieved subsequent value of the time delay distribution parameter.
4. The method of claim 1, further comprising:
terminating generation of the response attribution value when the calculated values of the response rate and time delay distribution parameters converge.
5. The method of claim 1, further comprising:
terminating generation of the response attribution value when a threshold number of iterations of generating have occurred.
6. The method of claim 1, further comprising:
terminating generation of the response attribution value when a threshold amount of computing resources have been expended.
7. The method of claim 1, wherein
the retrieved values for the response rate and time delay distribution parameters are arbitrarily provided values.
8. The method of claim 1, further comprising:
outputting from the one or more computers an identifier corresponding to the communication and associated response, and the determined response attribution value.
9. The method of claim 1, wherein
the regression model includes one of weighted regression, linear regression, quadratic regression, polynomial regression, spline function model, and sinusoid model.
10-20. (canceled)