What is claimed is:
1. A method of sensing data in a nonvolatile memory comprising the steps of:
selecting a flash memory cell having a first floating gate and a second floating gate, a first control gate and a second control gate, and a drain and a source;
flowing a current through a first channel under the first floating gate and detecting a current flow through a second channel under the second floating gate, thereby sensing a color state of the second floating gate;
flowing a current through the second channel and conducting level writings on the first floating gate, thereby forming different threshold voltages;
measuring a cell current of the first channel under the first floating gate;
comparing the measured cell current to a reference current, thereby sensing a level state of the first floating gate; and
sensing information bits stored in the flash memory cell according to a color state of the second floating gate and a level state of the first floating gate.
2. The method of sensing data according to claim 1, wherein the current flowing through the second channel is sensed as a white state, and no current flowing through the second channel is sensed as a black state.
3. The method of sensing data according to claim 1, wherein the threshold voltages of the first floating gate include threshold voltage levels of 2K(K1).
4. The method of sensing data according to claim 1, wherein two bit information is stored in the flash memory cell, the second floating gate has two color states, and the first floating gate has two level states.
5. The method of sensing data according to claim 1, wherein three bit information is stored in the flash memory cell, the second floating gate has two color states, and the first floating gate has four level states.
6. A nonvolatile memory having unit cells, each unit cell comprising:
a first gate insulating film formed on a semiconductor substrate;
a first floating gate and a second floating gate formed on the first gate insulating film, the first floating gate being isolated from the second floating gate;
impurity regions formed on first sides of the first and second floating gates;
a second gate insulating film formed on the semiconductor substrate inclusive of the first and second floating gates;
a first control gate formed on the second gate insulating film covering a top portion and the first side of the first floating gate; and
a second control gate formed on the second gate insulating film covering a top portion and the first side of the second floating gate, the second control gate being isolated from the first control gate
7. The nonvolatile memory according to claim 6, wherein the impurity region formed on the first side of the first floating gate is a drain, and the impurity region formed on the first side of the second floating gate is a source.
8. A cell array of nonvolatile memories comprising:
a matrix of flash memory cells, each flash memory cell having a first floating gate and a second floating gate, a first control gate and a second control gate, and a drain and a source;
a plurality of wordlines disposed in an axial direction and connected to the first control gates in a longitudinal direction;
a plurality of distinguishlines disposed in the longitudinal direction perpendicular to the wordlines and connected to the second control gates in the axial direction;
a plurality of bitlines disposed perpendicularly to the wordlines and connected to a power source contact;
a plurality of groundlines disposed in the axial direction parallel to the bitlines and connected to a ground contact;
a plurality of drainlines disposed in the axial direction parallel to the bitlines and contacting the drains in the axial direction;
a plurality of sourcelines disposed in the axial direction parallel to the groundlines and contacting the sources in the axial direction;
a plurality of drain selection transistors disposed between the plurality of drainlines and the power source contact;
a plurality of drain selection lines disposed parallel to the plurality of wordlines, thereby providing a drain selection signal to the plurality of drain selection transistors in the longitudinal direction;
a plurality of source selection transistors disposed between the sourceline and the ground contact in the longitudinal direction; and
a plurality of source selection lines disposed parallel to the plurality of wordlines, thereby providing a source selection signal to the plurality of source selection transistors in the longitudinal direction.
9. The cell array according to claim 8, wherein the drain is positioned on a first side of the first floating gate.
10. The cell array according to claim 8, wherein the source is positioned on a first side of the second floating gate.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A fixing device for conveying a recording medium carrying an unfixed image and fixing the unfixed image on the recording medium, the fixing device comprising:
a rotatable fixing member;
a rotatable pressing member that is in press contact with the fixing member to form a nip portion;
a heat source that heats the fixing member;
a temperature detection unit that detects a temperature of the fixing member; and
a temperature control unit configured to control power supply to the heat source based on temperature information input from the temperature detection unit, wherein
the temperature control unit is configured to control turn-on period of the heat source at an initial time period after start of the power supply and at an ending time period before end of the power supply to gradually change a temperature of the fixing member,
the fixing device has a correction table or a correction conversion formula to correct a difference between a necessary amount of heat and an actual amount of heat, the necessary amount of heat being an amount of heat necessary, according to calculation, for controlling the fixing member to be a predetermined temperature, and the actual amount of heat being an amount of heat in actually turning on the heat source according to the control of the turn-on period of the heat source to thereby gradually change the temperature of the fixing device, and
the temperature control unit is configured to correct, using the correction table or the correction conversion formula, the actual amount of heat or an actual turn-on duty in such a manner that the actual amount of heat or the actual turn-on duty coincides with a required amount of heat or a required turn-on duty that is calculated based on the temperature information, to thereby perform the control of power supply to the heat source according to the corrected actual amount of heat or the corrected actual turn-on duty.
2. The fixing device according to claim 1, wherein the correction table or the correction conversion formula is changed according to a control cycle used for calculation of the required duty.
3. The fixing device according to claim 1, wherein the correction table or the correction conversion formula is changed according to a frequency of an alternate current input to the heat source.
4. The fixing device according to claim 1, wherein the correction table or the correction conversion formula is changed according to a voltage input to the heat source.
5. The fixing device according to claim 1, wherein
the fixing member is an endless fixing belt,
the fixing device includes a nip forming member that is arranged inside the fixing belt and that is in press contact with the pressing member via the fixing belt, and
the heat source directly heats the fixing belt at a portion other than the nip portion.
6. An image forming device comprising a fixing device according to claim 1.