1. A mote system comprising:
at least one of an antenna signal generation unit or an antenna signal detection unit; and
a directional antenna system operably coupled with said at least one of an antenna signal generation unit or an antenna signal detection unit.
2. The mote system of claim 1, wherein said directional antenna system operably coupled with said at least one of an antenna signal generation unit or an antenna signal detection unit further comprises:
a beam-forming antenna system.
3. The mote system of claim 1, wherein said directional antenna system operably coupled with said at least one of an antenna signal generation unit or an antenna signal detection unit further comprises:
a beam-steering antenna system.
4. The mote system of claim 1, wherein said directional antenna system operably coupled with said at least one of an antenna signal generation unit or an antenna signal detection unit further comprises:
a switched-beam antenna system.
5. The mote system of claim 1, wherein said directional antenna system operably coupled with said at least one of an antenna signal generation unit or an antenna signal detection unit further comprises:
a horn antenna system.
6. The mote system of claim 1, wherein said directional antenna system operably coupled with said at least one of an antenna signal generation unit or an antenna signal detection unit further comprises:
one or more electromagnetic reflectors of one or more shapes corresponding to one or more selected antenna patterns.
7. The mote system of claim 1, wherein said directional antenna system operably coupled with said at least one of an antenna signal generation unit or an antenna signal detection unit further comprises:
an adaptive-antenna system.
8. The mote system of claim 1, wherein said directional antenna system operably coupled with said at least one of an antenna signal generation unit or an antenna signal detection unit further comprises:
a Yagi antenna.
9. The mote system of claim 1, wherein said directional antenna system operably coupled with said at least one of an antenna signal generation unit or an antenna signal detection unit further comprises:
a log-periodic antenna.
10. The mote system of claim 1, wherein said directional antenna system operably coupled with said at least one of an antenna signal generation unit or an antenna signal detection unit further comprises:
a parabolic antenna.
11. The mote system of claim 1, wherein said directional antenna system operably coupled with said at least one of an antenna signal generation unit or an antenna signal detection unit further comprises:
an array antenna.
12. The mote system of claim 1, wherein said directional antenna system operably coupled with said at least one of an antenna signal generation unit or an antenna signal detection unit further comprises:
a horn antenna.
13. The mote system of claim 1, wherein said directional antenna system operably coupled with said at least one of an antenna signal generation unit or an antenna signal detection unit further comprises:
a biconical antenna.
14. The mote system of claim 1, wherein said directional antenna system operably coupled with said at least one of an antenna signal generation unit or an antenna signal detection unit further comprises:
an antenna steering unit.
15. The mote system of claim 14, wherein said antenna steering unit further comprises:
an electromechanical system.
16. The mote system of claim 14, wherein said antenna steering unit further comprises:
a micro-electro-mechanical system.
17. The mote system of claim 14, wherein said antenna steering unit further comprises:
an electromagnetic system.
18. The mote system of claim 1, further comprising:
a mote having said directional antenna system operably coupled with said at least one of an antenna signal generation unit or an antenna signal detection unit.
19. The mote system of claim 18, further comprising:
at least one of an animate or inanimate unit in physical contact with said mote having said directional antenna system operably coupled with said at least one of an antenna signal generation unit or an antenna signal detection unit.
20. A mote method of using comprising:
distributing a mote, the mote having
(i) at least one of an antenna signal generation unit or an antenna signal detection unit, and
(ii) a directional antenna system operably couplable with said at least one of an antenna signal generation unit or an antenna signal detection unit.
21. The mote method of claim 20, wherein said distributing a mote further comprises:
emplacing at least one of an animate or inanimate unit in physical contact with the mote.
22. The mote method of claim 21, wherein said emplacing at least one of an animate or inanimate unit in physical contact with the mote further comprises:
positioning an inanimate component in physical contact with the mote.
23. The mote method of claim 21, wherein said emplacing at least one of an animate or inanimate unit in physical contact with the mote further comprises:
positioning an animate component in physical contact with the mote.
24. A mote method of making comprising:
forming a mote body; and
emplacing a directional antenna proximate to the mote body.
25. The mote method of claim 24, wherein said forming a mote body further comprises:
forming at least a part of the mote body from a substrate.
26. The mote method of claim 24, wherein said emplacing a directional antenna proximate to the mote body further comprises:
forming at least a part of the directional antenna from a substrate.
27. The mote method of claim 24, wherein said emplacing a directional antenna proximate to the mote body further comprises:
affixing at least a part of the directional antenna to the mote body.
28. A mote method comprising:
integrating a directional antenna proximate to a mote body with at least one of an animate or inanimate unit.
29. The mote method of claim 28, wherein said integrating a directional antenna proximate to a mote body with at least one of an animate or inanimate unit further comprises:
at least one of affixing the mote body to or encasing the mote body in an inanimate structural component.
30. The mote method of claim 28, wherein said integrating a directional antenna proximate to a mote body with at least one of an animate or inanimate unit further comprises:
at least one of affixing the mote body to or encasing the mote body in an animate structural component.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A signal transmitting device comprising:
a word puncturing controller configured to, when a video signal output from an image sensor is defined according to m\xd7n (where m and n refer to m samples\xd7n lines)a\u2212b (where a and b refer to frame rates)r:g:b (where r, g and b refer to signal ratios in case of a predetermined signal transmission scheme)16-bit signal, and each bit of a G signal of all samples included in a 1 ch 16-bit signal is G0, G1, . . . and G15, each bit of a B signal is B0, B1, . . . and B15 and each bit of a R signal is R0, R1, . . . and R15, puncture per word the 1 ch 16-bit signal including 4:4:4 of r:g:b and including the G, B and R signals of all samples, and map a 1 ch 16 bit-signal including 4:2:2 of r:g:b and including a G signal of all samples and B and R signals of even samples, and a 1 ch 16-bit signal including 0:2:2 of r:g:b and including B and R signals of odd samples without a G signal;
a mapping controller configured to map the 1 ch 16-bit signal punctured per word and including 4:2:2 of r:g:b, on first and second HD-SDI including 2 ch 10-bit signals including 4:2:2 of r:g:b according to a first mapping structure, and map a 1 ch 16-bit signal punctured per word and including 0:2:2 of r:g:b, on third HD-SDI including a 1 ch 10-bit signal including 4:2:2 of r:g:b according to a second mapping structure; and
a reading controller configured to output the first to third HD-SDI.
2. The signal transmitting device according to claim 1, wherein the mapping controller comprises:
a first mapping controller configured to map an odd bit of the G signal including a sample number identical to a Y channel, on the Y channel of the first HD-SDI, map an odd bit of the B signal including a sample number identical to a CB channel, on the CB channel, map an odd bit of the R signal including a sample number identical to a CR channel, on the CR channel, multiplex G14 and G15 of the G signal including the sample number identical to the Y channel, on upper 2 bits of the Y channel, multiplex B14 and B15 of the B signal including the sample number identical to a CB channel, on upper 2 bits of the CB channel, multiplex R14 and R15 of the R signal including the sample number identical to a CR channel, on upper 2 bits of the CR channel, map the even bit of the G signal including the sample number identical to the Y channel, on the Y channel of the second HD-SDI, map the even bit of the B signal including the sample number identical to the CB, on the CB channel, map the even bit of the R signal including the sample number identical to the CR channel, on the CR channel, multiplex the G14 and G15 of the G signal including the sample number identical to the Y channel, on upper 2 bits of the Y channel, multiplex the B14 and B15 of the B signal including the sample number identical to the CB channel, on the upper 2 bits of the CB channel, multiplex the R14 and R15 of the R signal including the sample number identical to the CR channel, on upper 2 bits of the CR channel, and multiplex an inverse bit obtained by inverting a bit at a predetermined position, on each channel of the Y channel, the CB channel and the CR channel of the first and second HD-SDI; and
a second mapping controller configured to map lower 7 bits of the B signal on an even sample of the Y channel of the third HD-SDI, multiplex the G14 and G15 of the G signal including the sample number (the even sample) identical to the Y channel, on upper 2 bits of the even sample of the Y channel, map lower 7 bits of the R signal on an odd sample of the Y channel of the third HD-SDI, multiplex the G14 and G15 of the G signal including the sample number (odd sample) identical to the Y channel, on upper 2 bits of the odd sample of the Y channel, map upper 9 bits of the B signal including the sample number identical to the CB channel, on the CB channel, and map upper 9 bits of the R signal including the sample number identical to the CR channel, and multiplex the inverse bit obtained by inverting the bit at the predetermined position, on each channel of the even sample and the odd sample of the Y channel, the CB channel and the CR channel.
3. The signal transmitting device according to claim 2, wherein the 1 ch 16-bit signal including 4:4:4 of r:g:b includes m\xd7n of 1920 samples\xd71080 lines or 2048 samples\xd71080 lines, and a\u2212b of 23.98 P-30 P or 47.95I-60I.
4. The signal transmitting device according to claim 2, comprising, when the 1 ch 16-bit signal including 4:4:4 of r:g:b includes m\xd7n of 1920 samples\xd71080 lines or 2048 samples\xd71080 lines, and a\u2212b of 47.95 P-60 P:
two sets of the word puncturing controllers;
two sets of the mapping controllers;
two sets of the reading controllers; and
a line puncturing controller configured to output a video signal obtained by alternately puncturing one line by one line the 1 ch 16-bit signal including 4:4:4 of r:g:b line as a 2 channel interlace signal, to the two sets of the word puncturing controllers,
wherein the two sets of the reading controllers output two sets of the first to third HD-SDI.
5. A signal transmitting method comprising:
when a video signal output from an image sensor is defined according to m\xd7n (where m and n refer to m samples\xd7n lines)a\u2212b (where a and b refer to frame rates)r:g:b (where r, g and b refer to signal ratios in case of a predetermined signal transmission scheme)16-bit signal, and each bit of a G signal of all samples included in a 1 ch 16-bit signal is G0, G1, . . . and G15, each bit of a B signal is B0, B1, . . . and B15 and each bit of a R signal is R0, R1, . . . and R15, puncturing per word the 1 ch 16-bit signal including 4:4:4 of r:g:b and including the G, B and R signals of all samples, and mapping a 1 ch 16-bit signal including 4:2:2 of r:g:b and including a G signal of all samples and B and R signals of even samples, and a 1 ch 16-bit signal including 0:2:2 of r:g:b and including B and R signals of odd samples without a G signal;
mapping the 1 ch 16-bit signal punctured per word and including 4:2:2 of r:g:b on first and second HD-SDI including 2 ch 10-bit signals including 4:2:2 of r:g:b according to a first mapping structure, and mapping a 1 ch 16-bit signal punctured per word and including 0:2:2 of r:g:b on third HD-SDI including a 1 ch 10-bit signal including 4:2:2 of r:g:b according to a second mapping structure; and
outputting the first to third HD-SDI.
6. A signal receiving device comprising:
a writing controller configured to, when a video signal output from an image sensor is defined according to m\xd7n (where m and n refer to m samples\xd7n lines)a\u2212b (where a and b refer to frame rates)r:g:b (where r, g and b refer to signal ratios in case of a predetermined signal transmission scheme)16-bit signal, and each bit of a G signal of all samples included in a 1 ch 16-bit signal is G0, G1, . . . and G15, each bit of a B signal is B0, B1, . . . and B15 and each bit of a R signal is R0, R1, . . . and R15, write first to third HD-SDI including 3 ch 10-bit signals including 4:2:2 of r:g:b, in a memory;
an extraction controller configured to extract the 1 ch 16-bit signal including 4:2:2 of r:g:b and including a G signal of all samples and B and R signals of even samples according to a first mapping structure, from the first and second HD-SDI including 2 ch 10-bit signals read from the memory, and extract a 1 ch 16-bit signal including 0:2:2 of r:g:b and including B and R signals of odd samples without a G signal according to a second mapping structure, from third HD-SDI including a 1 ch 10-bit signal including 4:2:2 of r:g:b; and
a word multiplexing controller configured to generate the 1 ch 16-bit signal including 4:4:4 of r:g:b and including G, B and R signals of all samples by multiplexing per word the 1 ch 16-bit signal including 4:2:2 of r:g:b and the 1 ch 16-bit signal including 0:2:2 of r:g:b.
7. The signal receiving device according to claim 6, wherein the extraction controller comprises:
a first extraction controller configured to extract an odd bit of the G signal including a sample number identical to a Y channel, from the Y channel of the first HD-SDI, extract an odd bit of the B signal including a sample number identical to a CB channel, from the CB channel, extract an odd bit of the R signal including a sample number identical to a CR channel, from the CR channel, extract the G14 and G15 of the G signal including the sample number identical to the Y channel, from upper 2 bits of the Y channel, extract the B14 and B15 of the B signal including the sample number identical to the CB channel, from the upper 2 bits of the CB channel, extract the R14 and R15 of the R signal including the sample number identical to the CR channel, from upper 2 bits of the CR channel, extract an even bit of the G signal including the sample number identical to the Y channel, from the Y channel of the second HD-SDI, extract even bits of the B signal including the sample number identical to the CB channel, from the CB channel, extract even bits of the R signal including the sample number identical to the CR channel, from the CR channel, extract the G14 and G15 of the G signal including the sample number identical to the Y channel, from upper 2 bits of the Y channel, extract the B14 and B15 of the B signal including the sample number identical to the CB channel, from the upper 2 bits of the CB channel, and extract the R14 and R15 of the R signal including the sample number identical to the CR channel, from upper 2 bits of the CR channel; and
a second extraction controller configured to extract lower 7 bits of the B signal on an even sample of the Y channel of the third HD-SDI, extract the G14 and G15 from upper 2 bits of the G signal including the sample number (the even sample) identical to the Y channel, extract lower 7 bits of the R signal from an odd sample of the Y channel of the third HD-SDI, extract the G14 and G15, from upper 2 bits of the G signal including the sample number (odd sample) identical to the Y channel, extract upper 9 bits of the B signal from the CB channel, and extract upper 9 bits of the R signal from the CR channel.
8. The signal receiving device according to claim 7, wherein the 1 ch 16-bit signal including 4:4:4 of r:g:b includes m\xd7n of 1920 samples\xd71080 lines or 2048 samples\xd71080 lines, and a\u2212b of 23.98 P-30 P or 47.95I-60I.
9. The signal receiving device according to claim 7, comprising, when the 1 ch 16-bit signal including 4:4:4 of r:g:b includes m\xd7n of 1920 samples\xd71080 lines or 2048 samples\xd71080 lines, and a\u2212b of 47.95 P-60 P:
two sets of the writing controllers;
two sets of the extraction controllers;
two sets of the word multiplexing controllers; and
a line multiplexing controller configured to provide the 1 ch 16-bit signal including 4:4:4 of r:g:b obtained by alternately multiplexing one line by one line an interlace signal which is word-multiplexed by the word multiplexing controller and which is the 2 ch 16-bit signals including 4:4:4 of r:g:b,
wherein the two sets of the reading controllers write two sets of the first to third HD-SDI to be input, in the memory.
10. A signal receiving method comprising:
when a video signal output from an image sensor is defined according to m\xd7n (where m and n refer to m samples\xd7n lines)a\u2212b (where a and b refer to frame rates)r:g:b (where r, g and b refer to signal ratios in case of a predetermined signal transmission scheme)16-bit signal, and each bit of a G signal of all samples included in a 1 ch 16-bit signal is G0, G1, . . . and G15, each bit of a B signal is B0, B1, . . . and B15 and each bit of a R signal is R0, R1, . . . and R15, writing first to third HD-SDI including 3 ch 10-bit signals including 4:2:2 of r:g:b, in a memory;
extracting the 1 ch 16-bit signal including 4:2:2 of r:g:b and including a G signal of all samples and B and R signals of even samples, from the first and second HD-SDI including 2 ch 10-bit signals read from the memory according to a first mapping structure, and extracting a 1 ch 16-bit signal including 0:2:2 of r:g:b and including B and R signals of odd samples without a G signal, from third HD-SDI including a 1 ch 10-bit signal including 4:2:2 of r:g:b according to a second mapping structure; and
generating the 1 ch 16-bit signal including 4:4:4 of r:g:b and including G, B and R signals of all samples by multiplexing per word the 1 ch 16-bit signal including 4:2:2 of r:g:b and the 1 ch 16-bit signal including 0:2:2 of r:g:b.
11. A signal transmitting system comprising:
a signal transmitting device including:
a word puncturing controller configured to, when a video signal output from an image sensor is defined according to m\xd7n (where m and n refer to m samples\xd7n lines)a\u2212b (where a and b refer to frame rates)r:g:b (where r, g and b refer to signal ratios in case of a predetermined signal transmission scheme)16-bit signal, and each bit of a G signal of all samples included in a 1 ch 16-bit signal is G0, G1, . . . and G15, each bit of a B signal is B0, B1, . . . and B15 and each bit of a R signal is R0, R1, . . . and R15, puncture per word the 1 ch 16-bit signal including 4:4:4 of r:g:b and including the G, B and R signals of all samples, and map a 1 ch 16-bit signal including 4:2:2 of r:g:b and including a G signal of all samples and B and R signals of even samples, and a 1 ch 16-bit signal including 0:2:2 of r:g:b and including B and R signals of odd samples without a G signal;
a mapping controller configured to map the 1 ch 16-bit signal punctured per word and including 4:2:2 of r:g:b on first and second HD-SDI including 2 ch 10-bit signals including 4:2:2 of r:g:b according to a first mapping structure, and map a 1 ch 16-bit signal punctured per word and including 0:2:2 of r:g:b on third HD-SDI including a 1 ch 10-bit signal including 4:2:2 of r:g:b according to a second mapping structure; and
a reading controller configured to output the first to third HD-SDI; and
a signal receiving device including:
a writing controller configured to write the first to third HD-SDI including 3 ch 10-bit signals, in a memory;
an extraction controller configured to extract the 1 ch 16-bit signal including 4:2:2 of r:g:b, from the first and second HD-SDI read from the memory according to the first mapping structure, and extract a 1 ch 16-bit signal including 0:2:2 of r:g:b, from third HD-SDI including a 1 ch 10-bit signal including 4:2:2 of r:g:b according to the second mapping structure; and
a word multiplexing controller configured to generate the 1 ch 16-bit signal including 4:4:4 of r:g:b by multiplexing per word the 1 ch 16-bit signal including 4:2:2 of r:g:b and the 1 ch 16-bit signal including 0:2:2 of r:g:b.