What is claimed is:
1. A circuit design method for designing an integrated circuit device including conductive members with a multilayered structure connected to a gate insulating film of a transistor element, said method comprising the steps of:
calculating damage to said gate insulating film for each of a plurality of antenna units of said conductive members; and
if a cumulative sum of the calculated damage is greater than or equal to a predetermined value, changing the design of an integrated circuit device such the cumulative sum of the calculated damage becomes less than said predetermined amount.
2. A circuit design method for designing an integrated circuit device including conductive members with a multilayered structure connected to a gate insulating film of a transistor element, said method comprising the steps of:
calculating an antenna ratio Ri, for 1in, for each of n antenna units of said conductive members from an antenna size Mi, for 1in, for each of the n antenna units of said conductive members and an actual area of Sj of said gate insulating film from the equation:
RiMiSj
calculating individual damage Di , for 1in, for each of the n antenna units of said conductive members with respect to said actual area Sj of said gate insulating film from a maximum permissible antenna ratio Rmi, for 1in, for each of the n antenna units of said conductive members with respect to said actual area Sj of said gate insulating film from the equation:
Dif(RiRmi)
where f( ) is a predetermined function calculating a damage total amount DD1D2 . . . Dn acting on said gate insulating film from the preceding calculating results;
if said damage total amount D is greater than or equal to 1, changing the design of an integrated circuit device such the damage total amount D becomes less than 1.
3. A circuit design method according to claim 2, wherein said Di(RiRmi) is calculated from the equation:
Di(RiRmi)a
where a is a constant larger than 0.
4. A circuit design method according to claim 3, wherein said constant a satisfies the relationship:
0.5a1.8.
5. A circuit design method according to claim 2, further comprising the step of calculating the maximum permissible antenna ratio Rmi for each of the n antenna units of said conductive member for the actual area Sj of said gate insulating film when a maximum permissible antenna size M0i is defined for each of the n antenna units of said conductive members with respect to a reference area S0 of said gate insulating film from the equation:
Rmi(M0iS0)(S0Sj)b
where b is a predetermined constant.
6. A circuit design method according to claim 2, further comprising the step of calculating the maximum permissible antenna ratio Rmi for each of the n antenna units of said conductive member for the actual area Sj of said gate insulating film when a maximum permissible antenna size M0i is defined for each of the n antenna units of said conductive members with respect to a reference area S0 of said gate insulating film from the equation:
Rmi(M0iS0)(SjS0)
where , are predetermined constants.
7. A circuit design method according to claim 5, wherein said constant b satisfies the relationship:
2.0b0.8.
8. A circuit design method according to claim 6, wherein said constant , satisfies the relationship:
<, 0.92.2, 0.11.3.
9. A circuit design apparatus for use in design of an integrated circuit device including conductive members with a multilayered structure connected to a gate insulating film of a transistor element, comprising:
data input means for receiving, as data, an actual area Sj of said gate insulating film, a maximum permissible antenna ratio Rmi, for 1in, for each of n antenna units of said conductive members with respect to said area Sj, and an antenna size Mi, for 1in, for each of said antenna units;
ratio calculating means for calculating, in response to the data input to said data input means, an antenna ratio Ri, for 1in, for each of the n antenna units of said conductive members with respect to the actual area Sj of said gate insulating film from the equation:
RiMiSj;
individual calculation means for calculating individual damage Di, for 1in, for each of the n antenna units of said conductive members with respect to the actual area Sj of said gate insulating film from the equation:
Dif(RiRmi)
where f( ) is a predetermined function; and
total amount calculation means for calculating a damage total amount DD1D2 . . . Dn acting on said gate insulating film from the calculating results in said individual calculation means.
10. A circuit design apparatus according to claim 9, further comprising passfail determining means for indicating that design is faulty when said damage total amount D calculated by said total amount calculation means is equal to or greater than 1.
11. A circuit design apparatus according to claim 9, wherein said individual calculation means calculates said individual damage Di for each of the n antenna units of said conductive members from the equation:
Di(RiRmi)a
where a is a constant larger than 0.
12. An integrated circuit device comprising conductive members with a multilayered structure connected to a gate insulating film of a transistor element,
wherein a maximum permissible antenna ratio Rmi, for 1in, is set for each of n antenna units of said conductive members with respect to an actual area Sj of said gate insulating film; and
an antenna size Mi, for 1in, for each of the n antenna units of said conductive members with respect to the actual area Sj of said gate insulating film satisfies the relationship:
f((MiSj)Rmi)<1
where f( ) is a predetermined function.
13. An integrated circuit device comprising conductive members with a multilayered structure connected to a gate insulating film of a transistor element,
wherein a maximum permissible antenna ratio Rmi, for 1in, is set for each of n antenna units of said conductive members with respect to an actual area Sj of said gate insulating film; and
an antenna size Mi, for 1in, for each of the n antenna units of said conductive members with respect to the actual area Sj of said gate insulating film satisfies the relationship:
((MiSj)RMi)a<1
where a is a constant larger than 0.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
What is claimed is:
1. A system for casting an assay matrix, comprising:
a first plate and a second plate positioned substantially parallel to one another for receiving in between the plates a mold for casting the assay matrix;
wherein the mold comprises a frame having a first side and a second side, and a first film that covers the first side of the frame;
wherein the mold forms at least part of a chamber for receiving a material for casting the assay matrix;
wherein a passageway is provided into the chamber that is suitable for introduction of the material for casting into the chamber; and
wherein the mold is removable from the plates.
2. The system of claim 1, wherein the mold further comprises a second film that covers the second side of the frame
3. The system of claim 2, wherein at least one of the first film or the second film is made of a plastic material.
4. The system of claim 1, wherein the passageway comprises a first orifice in the first plate and a second orifice in the first film, and wherein the first and second orifices are collocated.
5. The system of claim 1, wherein the frame comprises a plurality of inner walls and a plurality of outer walls.
6. The system of claim 5, wherein the inner walls form a closed contour.
7. The system of claim 6, wherein the frame comprises at least three inner walls.
8. The system of claim 1, wherein one of the plates is configured for changing the temperature of the material.
9. The system of claim 8, wherein one of the plates is configured for transferring heat to the to material.
10. The system of claim 8, wherein one of the plates is configured for cooling the material.
11. The system of claim 8, wherein at least one of the plates is a metallic plate.
12. The system of claim 8, further comprising a biasing structure urging at least one of the plates in the direction of the other plate.
13. The system of claim 4, further comprising a device for guiding the material through the first orifice, into the second orifice, and into the chamber.
14. The system of claim 10, further comprising a device for injecting the material into the device for guiding.
15. The system of claim 1, further comprising a device for delivering the material into the chamber, wherein the device applies a positive pressure to the material.
16. The system of claim 11, wherein the material is a liquid gel material.
17. A method of making an assay matrix, comprising:
providing two substantially parallel plates;
providing an assay matrix casting mold comprising a frame placed between two films, wherein the mold forms at least part of a chamber for receiving a material for casting the assay matrix;
placing the mold between the two plates, wherein the mold is removable from the plates;
providing a passageway into the chamber that is suitable for introduction of the material into the chamber; and
introducing the material into the chamber.
18. The method of claim 17, wherein at least one of the films and at least one of the plates each comprises an orifice for allowing the material into chamber.
19. The method of claim 17, further comprising applying pressure to at least one of the plates in the direction of the other plate.
20. The method of claim 17, further comprising changing the temperature of the material through at least one of the plates.
21. The method of claim 20, wherein changing the temperature comprises heating the material.
22. The method of claim 20, wherein changing the temperature comprises cooling the material.
23. The method of claim 20, wherein the material is a liquid gel material.
24. An apparatus for aiding in the casting and handling of an assay matrix, where plates are used for casting of the assay matrix, comprising:
a frame, having a plurality of inner and outer walls, positioned between two films;
wherein the plurality of inner walls and the two films are configured to form a chamber for receiving a material for casting an assay matrix;
a passageway into the chamber for injection of the material; and
wherein the frame is removable from the plates.
25. The apparatus of claim 24, wherein at least one of the films is configured with an orifice for receiving the material.
26. The apparatus of claim 24, wherein the frame is configured with an asymmetry to indicate orientation.
27. The apparatus of claim 24, wherein the frame is configured with one or more notches for positioning the frame in a device for casting the assay matrix.
28. The apparatus of claim 24, wherein the frame is configured with one or more notches for positioning the frame on a substrate.
29. The apparatus of claim 24, further comprising an assay matrix placed in the chamber.
30. The apparatus of claim 29, wherein the assay matrix comprises a gel matrix.
31. A system for performing an assay, comprising:
an assay matrix assembly comprising a gel slab laterally bounded by a frame and covered on at least a top side or a bottom side by a removable film; and
a planar substrate substantially sized and shaped to mate with the assay matrix assembly upon removal of the film such that diffusion of at least one assay agent can take place between the gel slab and the planar substrate.
32. The system of claim 31, wherein the gel slab contains at least one reagent for performing the assay.
33. The system of claim 32, wherein the substrate comprises an array of diffusible materials, the diffusible materials at least potentially capable of activity with the at least one reagent.
34. The system of claim 33, wherein the diffusible materials diffuse into gel slab.
35. The system of claim 34, wherein the diffusible materials are chemical compounds.