1. An optical access network system in which a star coupler is provided at one end of an optical fiber channel and which performs two-way optical communications using code division multiplexing between an optical line terminal that is joined to the other end of said optical fiber channel and a plurality of optical network units respectively joined to a plurality of branched optical fiber channels that are formed branched by said star coupler,
wherein said optical line terminal comprises a bandwidth allocation section and a bandwidth control section comprising signal converter pairs in a number equal to the number of said optical network units,
each of said optical network units comprises a bandwidth allocation section and a bandwidth control section that comprises one set of signal converter pairs,
each of said signal converter pairs is installed as one set of a variable serial to parallel conversion unit and a variable parallel to serial conversion unit each having a variable bandwidth management function, and
said bandwidth allocation section comprises an encoder group that comprises a plurality of encoders that encode parallel signals that are output by said variable serial to parallel conversion unit and a parallel signal multiplexer that multiplexes said parallel signals that are output by said encoder group, a decoder group that comprises a plurality of decoders that decode parallel signals that are input to said variable parallel to serial conversion unit, and a serial signal distributor that divides the serial signal for generating the parallel signals that are input to said decoder group.
2. The code division multiplexing optical access network system according to claim 1, wherein said optical line terminal further comprises:
PHYMAC interfaces provided in a number equal to the number of said optical network units and having a function to perform 4B5B conversion on a serial signal that is input to a layer-3 switch and a serial signal that is output by said layer-3 switch; and
an OE converter that converts a signal that is input to said bandwidth allocation section into an electrical signal and converts an electrical signal that is output by the bandwidth allocation section into an optical signal, and
wherein each of said optical network units further comprises:
a PHYMAC interface that has a function to perform 4B5B conversion on a serial signal; and
an OE converter that converts a signal that is input to said bandwidth allocation section into an electrical signal and converts a signal that is output by said bandwidth allocation section into an optical signal.
3. The code division multiplexing optical access network system according to claim 1, wherein
said variable serial to parallel conversion unit comprises: a demultiplexer that converts a serial signal into parallel signals; a first buffer circuit that temporarily stores the serial signal and inputs the serial signal to said demultiplexer; a first buffer circuit group that temporarily stores the parallel signals that are output by said demultiplexer and inputs the parallel signals to said bandwidth allocation section; and a variable serial to parallel conversion unit control section,
said variable parallel to serial conversion unit comprises: a multiplexer that converts parallel signals into a serial signal; a second buffer circuit group that temporarily stores the parallel signals output by said decoder group of said bandwidth allocation section and inputs the parallel signals to said multiplexer; a second buffer circuit that temporarily stores and outputs the serial signal output by said multiplexer; and a variable parallel to serial conversion unit control section,
said variable serial to parallel conversion unit control section comprises a demultiplexer control signal generator, a first high-speed variable clock signal generator, and a first delayed clock signal generator and supplies a control signal to said demultiplexer, said first buffer circuit and said first buffer circuit group, and
said variable parallel to serial conversion unit control section comprises a multiplexer control signal generator, a second high-speed variable clock signal generator, and a second delayed clock signal generator, and supplies a control signal to said multiplexer, said second buffer circuit, and said second buffer circuit group.
4. The code division multiplexing optical access network system according to claim 2, wherein
said variable serial to parallel conversion unit comprises: a demultiplexer that converts a serial signal into parallel signals; a first buffer circuit that temporarily stores the serial signal and inputs the serial signal to said demultiplexer; a first buffer circuit group that temporarily stores the parallel signals that are output by said demultiplexer and inputs the parallel signals to said bandwidth allocation section; and a variable serial to parallel conversion unit control section,
said variable parallel to serial conversion unit comprises: a multiplexer that converts parallel signals into a serial signal; a second buffer circuit group that temporarily stores the parallel signals output by said decoder group of said bandwidth allocation section and inputs the parallel signals to said multiplexer; a second buffer circuit that temporarily stores and outputs the serial signal output by said multiplexer; and a variable parallel to serial conversion unit control section,
said variable serial to parallel conversion unit control section comprises a demultiplexer control signal generator, a first high-speed variable clock signal generator, and a first delayed clock signal generator and supplies a control signal to said demultiplexer, said first buffer circuit and said first buffer circuit group, and
said variable parallel to serial conversion unit control section comprises a multiplexer control signal generator, a second high-speed variable clock signal generator, and a second delayed clock signal generator, and supplies a control signal to said multiplexer, said second buffer circuit, and said second buffer circuit group.
5. The code division multiplexing optical access network system according to claim 1, further comprising:
a bandwidth management section that sends a bandwidth setting signal for changing the number of parallel signals to the variable serial to parallel conversion unit control section; and
a bandwidth management section that sends a bandwidth setting signal for changing the number of parallel signals to said variable parallel to serial conversion unit control section,
wherein each of said bandwidth management sections is constituted comprising a command line interface, a timer, and a memory.
6. The code division multiplexing optical access network system according to claim 2, further comprising:
a bandwidth management section that sends a bandwidth setting signal for changing the number of parallel signals to the variable serial to parallel conversion unit control section; and
a bandwidth management section that sends a bandwidth setting signal for changing the number of parallel signals to said variable parallel to serial conversion unit control section,
wherein each of said bandwidth management sections is constituted comprising a command line interface, a timer, and a memory.
7. The code division multiplexing optical access network system according to claim 3, further comprising:
a bandwidth management section that sends a bandwidth setting signal for changing the number of parallel signals to the variable serial to parallel conversion unit control section; and
a bandwidth management section that sends a bandwidth setting signal for changing the number of parallel signals to said variable parallel to serial conversion unit control section,
wherein each of said bandwidth management sections is constituted comprising a command line interface, a timer, and a memory.
8. The code division multiplexing optical access network system according to claim 4, further comprising:
a bandwidth management section that sends a bandwidth setting signal for changing the number of parallel signals to the variable serial to parallel conversion unit control section; and
a bandwidth management section that sends a bandwidth setting signal for changing the number of parallel signals to said variable parallel to serial conversion unit control section,
wherein each of said bandwidth management sections is constituted comprising a command line interface, a timer, and a memory.
9. The code division multiplexing optical access network system according to claim 3, wherein
a control signal generation section of said variable serial to parallel conversion unit control section which generates and outputs a switch changeover signal that is supplied to said demultiplexer, a read signal that is supplied to said first buffer circuit and a delayed clock signal that is supplied to said first buffer circuit group, and
a control signal generation section of said variable parallel to serial conversion unit control section which generates and outputs a switch changeover signal that is supplied to said multiplexer, a read signal that is supplied to said second buffer circuit and a delayed clock signal that is supplied to said second buffer circuit group,
are each formed by a control signal generation circuit that is constituted comprising a two-bit counter, a shift register, a NAND gate group, an AND gate group, an OR gate, an AND gate, and a flip-flop circuit.
10. The code division multiplexing optical access network system according to claim 4, wherein
a control signal generation section of said variable serial to parallel conversion unit control section which generates and outputs a switch changeover signal that is supplied to said demultiplexer, a read signal that is supplied to said first buffer circuit and a delayed clock signal that is supplied to said first buffer circuit group, and
a control signal generation section of said variable parallel to serial conversion unit control section which generates and outputs a switch changeover signal that is supplied to said multiplexer, a read signal that is supplied to said second buffer circuit and a delayed clock signal that is supplied to said second buffer circuit group,
are each formed by a control signal generation circuit that is constituted comprising a two-bit counter, a shift register, a NAND gate group, an AND gate group, an OR gate, an AND gate, and a flip-flop circuit.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A simulation construction method for measurement of a control rod insertion time when a control rod falls by the gravity toward a core of a nuclear reactor, the method comprising:
three-dimensionally modeling an inside wall of the nuclear reactor, the control rod accommodated inside the nuclear reactor, a guide tube guiding the control rod, an impact absorption tube located at the bottom of the guide tube with a diameter smaller than the diameter of the guide tube, a first flow hole which is located in the inside wall of the guide tube, and a second flow hole which is located at the bottom of the impact absorption tube;
configuring a flow field by dividing the inside of the nuclear reactor into a plurality of cells, wherein the flow field is differentially configured by a variable grid system comprising a plurality of variable cells which change the configuration as the control rod changes the location on the path along which the control rod passes and by an aligned grid system comprising a plurality of fixed cells which maintain the configuration regardless of the location change of the control rod;
calculating a simulation estimated value for the insertion time until the control rod is inserted into the impact absorption tube by analyzing a thermal-hydraulic phenomenon using three-dimensional computational fluid dynamics (CFD) codes; and
changing a size of the variable cells andor a size of the fixed cell, when the estimated value is compared with the actual value for the insertion time when the control rod falls inside the nuclear reactor, and an error between the estimated value and the actual value is determined to be out of a reference range.
2. The method of claim 1, further comprising calculating a hydraulic drag of the control rod caused by the water filling inside of the nuclear reactor when the control rod falls.
3. The method of claim 1, wherein the friction force between the water and the control rod and the weight of the control rod are considered when the control rod falls.
4. The method of claim 1, wherein the reference range is set in such a way that the error between the estimated value and the actual value lies within 5% of the reference range.
5. The method of claim 1, wherein the thermal-hydraulic phenomenon comprises a pressure change, a temperature change, and a density change in the water around the control rod when the control rod falls.