1. A process for the production of a compound of Formula (IX):
wherein
A represents C6 to C10 aryl which may be unsubstituted or substituted with one to three substituents independently selected from the group consisting of (i) halo, (ii) C1 to C6 alkyl and (iii) unsubstituted C6 to C10 aryl,
comprising subjecting a compound of Formula (X):
to an oxidation reaction in the presence of a catalytic amount of a stable organic nitroxyl radical.
2. The process of claim 1 wherein the oxidation reaction comprises the use of sodium hypochlorite in the presence of a catalytic amount of a stable organic nitroxyl radical.
3. The process of claim 2 wherein the organic nitroxyl radical is TEMPO free radical.
4. The process of claim 1 wherein A represents phenyl.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A multi-core microprocessor having a plurality of processor cores coupled to a bridge element, said bridge element configured to send transactions to andor receive transactions from said processor cores, each transaction comprising one or more packets, said transactions including a transaction representing an atomic instruction,
wherein said bridge element comprises a buffer unit configured to store a time stamp for each packet sent to andor received from the processor cores.
2. The multi-core microprocessor of claim 1, wherein said time stamp indicates the point of time at which the respective packet has been captured and stored in the buffer unit.
3. The multi-core microprocessor of claim 1, wherein said atomic instruction is an atomic read-modify-write instruction.
4. The multi-core microprocessor of claim 1, adapted to determine a probability of an error in an atomic instruction based on the proximity in time between packets of the respective transaction representing the atomic instruction and packets of other transactions.
5. The multi-core microprocessor of claim 4, wherein said other transactions overlap in time with the transaction representing the atomic instruction, wherein the multi-core microprocessor is adapted to identify said other transactions by evaluating the time stamps of their packets.
6. The multi-core microprocessor of claim 4, wherein said other transactions are transactions updating the same coherency granule as the transaction representing the atomic instruction.
7. The multi-core microprocessor of claim 4, adapted to determine said probability based on a normal distribution having distribution parameters being unique for each packet-to-packet relation.
8. The multi-core microprocessor of claim 7, wherein said distribution parameters are selected in an iterative fine-tuning process that includes simulation and analysis of system data.
9. The multi-core microprocessor of claim 1, adapted to detect an error in an atomic instruction by determining probability values for each pair of packets including a packet of the transaction representing the atomic instruction and a packet of another transaction overlapping in time with the transaction representing the atomic instruction, classifying the determined probability values by grouping them into a number of buckets representing different probability ranges, and determining whether the bucket representing the range of the highest probabilities is at least partly filled.
10. The multi-core microprocessor of claim 9, adapted to determine, if no error is detected, a risk factor based on the classification into other buckets than the bucket representing the range of the highest probabilities, and start a simulation process dependent on the risk factor.
11. A multiprocessor system comprising:
a plurality of microprocessor nodes each having a plurality of microprocessor cores, the plurality of microprocessor nodes and cores being connected to form a transactional point-to-point communication network; and
debug hardware adapted to validate atomic operations, said debug hardware configured to capture and time stamp intra-node andor inter-node transaction packets.
12. The multiprocessor system of claim 11, wherein each microprocessor node further has a bridge element coupled to the microprocessor cores of the respective microprocessor node, and said debug hardware comprises a buffer in each bridge element for buffering time stamps of intra-node transaction packets.
13. The multiprocessor system of claim 11, wherein said debug hardware is further adapted to determine a probability of an error in an atomic read-modify-write operation based on the proximity in time between packets of the transaction representing the atomic instruction and packets of other transactions.
14. A method of detecting errors caused by a modifying atomic transaction in a multi-core microprocessor environment, the method comprising:
collecting data relating to packets pertaining to said modifying atomic transaction and other transactions communicated between microprocessor cores of the environment;
processing the collected data; and
evaluating results of said processing,
wherein said data include time stamps indicating a point of time at which the respective packets have been transmitted between the respective microprocessor cores.
15. The method of claim 14, wherein processing the collected data comprises:
identifying packets pertaining to said modifying atomic transaction;
identifying packets pertaining to said other transactions; and
computing, for each pair of packets built from one packet of said modifying atomic transaction and one packet of said other transactions, a probability value dependent on the time difference between the related time stamps.
16. The method of claim 15, wherein evaluating results of said processing comprises:
comparing the computed probability values with a threshold; and
notifying an error if at least one of the computed probability values exceeds said threshold.
17. The method of claim 15, wherein computing the probability value is based on a symmetric probability distribution function having its maximum when there is no time difference.
18. The method of claim 17, wherein the height and shape of said symmetric probability distribution function depends on the pair of packets for which the probability value is computed.
19. The method of claim 15, wherein identifying packets pertaining to said other transactions comprises:
selecting only those ones of said other transactions that update the same coherency granule as said modifying atomic transaction and that overlap in time with said modifying atomic transaction; and
identifying the packets pertaining to the selected transactions.
20. The method of claim 16, wherein selecting the transactions comprises:
obtaining the time stamp of the respective ones of said other transactions and said modifying atomic transaction to determine whether the transactions overlap in time.