1. A transmitting optical sub-assembly, comprising:
a semiconductor light-emitting device for emitting light by providing a modulation signal;
a thermoelectric cooler for controlling a temperature of said semiconductor light-emitting device; and
an insulating carrier including a first mounting surface and an inner ground layer, said first mounting surface providing a first transmission line for transmitting said modulation signal, a first terminator connected to said first transmission line and a surface ground layer connected to said inner ground layer,
wherein said carrier is mounted on said thermoelectric cooler and said semiconductor light-emitting device is mounted on said first mounting surface of said carrier.
2. The transmitting optical sub-assembly according to claim 1,
wherein said first terminator is connected in serial to said first transmission line.
3. The transmitting optical sub-assembly according to claim 1,
wherein said first terminator is connected between said first transmission line and said surface ground layer.
4. The transmitting optical sub-assembly according to claim 1,
wherein said first mounting surface of said insulating carrier further includes a second transmission line and a second terminator connected to said second transmission line, and
wherein said second transmission line transmits another modulation signal having a phase opposite to a phase of said modulation signal.
5. The transmitting optical sub-assembly according to claim 4,
wherein a first distance from said light-emitting device to said first terminator is shorter than a second distance from said light-emitting device to said 10 second terminator.
6. The transmitting optical sub-assembly according to claim 5,
further includes a multi-layered ceramic substrate for transmitting said modulation signal and said another modulation signal to said carrier,
wherein a difference between said first distance and said second distance is compensated on said multi-layered ceramic substrate.
7. The transmitting optical sub-assembly according to claim 4,
wherein said first terminator is connected in serial to said first transmission line and said second terminator is connected in serial to said second transmission line.
8. The transmitting optical sub-assembly according to claim 4,
wherein said first terminator is connected between said first transmission line and said surface ground plane, and said second terminator is connected between said second transmission line and said surface ground plane.
9. The transmitting optical sub-assembly according to claim 1,
further comprises a package having a package ground,
wherein said surface ground in said carrier is isolated from said package ground within said package.
10. The transmitting optical sub-assembly according to claim 1,
wherein said carrier is made of aluminum nitride.
11. The transmitting optical sub-assembly according to claim 10,
further provides a lens made of glass for collimating said light emitted from said light-emitting device, and
said carrier further provides a second mounting surface for directly mounting said lens thereon without lens holder.
12. The transmitting optical sub-assembly according to claim 11,
wherein a level of said first mounting surface is higher than a level of said second mounting surface.
13. The transmitting optical sub-assembly according to claim 1,
wherein said light-emitting device comprises a semiconductor laser diode for generating light in a continuous wave by providing a bias current thereto through a bypass capacitor and a semiconductor optical modulator for modulating said light generated in said semiconductor laser diode by providing said modulation signal transmitted in said first transmission line.
14. The transmitting optical sub-assembly according to claim 13,
wherein said semiconductor laser diode is integrally formed with said semiconductor optical modulator.
15. The transmitting optical sub-assembly according to claim 1,
wherein said light-emitting device is a semiconductor laser diode, and said first terminator is connected in serial to said first transmission line.
16. The transmitting optical sub-assembly according to claim 1,
wherein said light-emitting device is a semiconductor laser diode having a first electrode and a second electrode, said first terminator is connected in serial to said first transmission line, and
said carrier further includes a second transmission line and a second terminator connected in serial to said second transmission line,
wherein said first electrode of said semiconductor laser diode is connected to said first terminator for receiving said modulation signal, and
said second electrode of said semiconductor laser diode is connected to said second terminator for receiving another modulation signal having a phase opposite to a phase of said modulation signal.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. An apparatus for measuring a time period, comprising:
a constant current source;
a current steering switch coupled to the constant current source;
a capacitor coupled to the current steering switch, the capacitor having a known value of capacitance, wherein a voltage on the capacitor increases substantially linearly in time when the current steering switch couples the constant current source to the capacitor;
a circuit for controlling the current steering switch, wherein the current steering switch couples the capacitor to the constant current source when the circuit detects a start of an event and decouples the capacitor from the constant current source when the circuit detects an end of the event;
an analog-to-digital converter (ADC) for converting the voltage on the capacitor to a digital representation thereof; and
a digital processor for converting the digital representation of the voltage on the capacitor to a time value representative of a time period between the start and the end of the event,
wherein the circuit for controlling the current steering switch, comprises:
a first flip-flop having a clock input coupled to a first event signal edge indicating the beginning of the event;
a second flip-flop having a clock input coupled to a second event signal edge indicating the end of the event; and
an AND gate having a first input coupled to a Q-output of the first flip-flop, a second input coupled to a Q-not output of the second flip-flop and an output coupled to a control input of the current steering switch.
2. The apparatus according to claim 1, wherein the ADC is a successive approximation ADC.
3. The apparatus according to claim 1, wherein the ADC is a sigma-delta ADC.
4. The apparatus according to claim 3, further comprising a voltage sampling circuit for sampling the voltage on the capacitor and coupling the sampled voltage to the sigma-delta ADC.
5. The apparatus according to claim 1, wherein the digital processor calculates the time period of the event from the known value of capacitance and the digital representation of the voltage.
6. The apparatus according to claim 1, wherein the digital processor is a microcontroller.
7. The apparatus according to claim 1, further comprising a NAND gate having a first input coupled to the Q-output of the first flip-flop, a second input coupled to a Q-output of the second flip-flop and an output coupled to reset inputs of the first and second flip-flops.
8. The apparatus according to claim 1, wherein the constant current source, the current steering switch, the capacitor, the circuit for controlling the current steering switch, the ADC and the digital processor are fabricated on an integrated circuit die.
9. The apparatus according to claim 8, wherein the integrated circuit die is enclosed in an integrated circuit package.
10. A method for measuring a time period, said method comprising the steps of:
providing a constant current source;
providing a capacitor having a known value of capacitance;
upon receipt of a first event signal edge setting a first flip-flop having a clock input coupled to the first event signal edge thereby indicating the beginning of an event and upon receipt of a second event signal edge setting a second flip-flop having a clock input coupled to the second event signal edge indicating the end of the event;
ANDing a Q-output of the first flip-flop and a Q-not output of second flip-flop to control a steering switch for charging the capacitor having the known value of capacitance from the constant current source;
converting a voltage on the capacitor to a digital representation thereof after the end of the event; and
converting the digital representation of the voltage to a time value representative of a time period between the start and the end of the event.
11. The method according to claim 10, wherein the step of converting the digital representation of the voltage to a time value comprises the step of calculating the time period of the event from the known value of capacitance and the digital representation of the voltage on the capacitor at the end of the event.
12. A method for measuring a time period, comprising:
providing a constant current source;
providing a current steering switch coupled to the constant current source;
providing a capacitor coupled to the current steering switch, wherein a voltage on the capacitor increases substantially linearly in time when the current steering switch couples the constant current source to the capacitor;
upon receipt of a first event signal edge setting a first flip-flop having a clock input coupled to the first event signal edge thereby indicating the beginning of an event and upon receipt of a second event signal edge setting a second flip-flop having a clock input coupled to the second event signal edge indicating the end of the event;
ANDing a Q-output of the first flip-flop and a Q-not output of second flip-flop to control the current steering switch to couple the capacitor to the constant current source
or to decouple the capacitor from the constant current source;
converting the voltage on the capacitor to a digital representation thereof after receiving the stop signal.
13. The method according to claim 12, further comprising determining a time period between the start and the stop signal from a known value of capacitance and the digital representation of the voltage.
14. The method according to claim 12, further comprising determining a capacitance of the capacitor from a known time period the start and the stop signal and the digital representation of the voltage.
15. The method according to claim 12, wherein the start signal is provided by a rising edge of a first control signal and the stop signal is provided by a falling edge of a second control signal.
16. The method according to claim 12, wherein the start signal is provided by a rising edge of a control signal and the stop signal is provided by a falling edge of the control signal.
17. The method according to claim 12, wherein the start signal is provided by a rising edge of a first control signal and the stop signal is provided by a rising edge of a second control signal.
18. The method according to claim 17, wherein the first control signal is an asynchronous signal the second control signal is a system clock signal.
19. The method according to claim 18, wherein the first control signal is an asynchronous signal the second control signal is a system clock signal.
20. The method according to claim 12, wherein the start signal is provided by a falling edge of a first control signal and the stop signal is provided by a rising edge of a second control signal.
21. An apparatus for measuring a time period, comprising:
a constant current source;
a current steering switch coupled to the constant current source;
a capacitor coupled to the current steering switch, wherein a voltage on the capacitor increases substantially linearly in time when the current steering switch couples the constant current source to the capacitor;
a logic circuit for controlling the current steering switch comprising a first and second input for receiving a start signal and a stop signal, wherein the current steering switch couples the capacitor to the constant current source when the circuit receives the start signal and decouples the capacitor from the constant current source when the circuit receives the stop signal;
an analog-to-digital converter (ADC) for converting the voltage on the capacitor to a digital representation thereof;
wherein the logic circuit for controlling the current steering switch, comprises:
a first flip-flop having a clock input coupled to a first event signal edge forming the start signal;
a second flip-flop having a clock input coupled to a second event signal edge forming the stop signal; and
an AND gate having a first input coupled to a Q-output of the first flip-flop, a second input coupled to a Q-not output of the second flip-flop and an output coupled to a control input of the current steering switch.
22. The apparatus according to claim 21, wherein the start signal is provided by a rising edge of a first control signal and the stop signal is provided by a falling edge of a second control signal.
23. The apparatus according to claim 21, wherein the start signal is provided by a rising edge of a control signal and the stop signal is provided by a falling edge of the control signal.
24. The apparatus according to claim 21, wherein the start signal is provided by a rising edge of a first control signal and the stop signal is provided by a rising edge of a second control signal.
25. The apparatus according to claim 24, wherein the first control signal is an asynchronous signal the second control signal is a system clock signal.
26. The apparatus according to claim 21, wherein the start signal is provided by a falling edge of a first control signal and the stop signal is provided by a rising edge of a second control signal.
27. The apparatus according to claim 26, wherein the first control signal is an asynchronous signal the second control signal is a system clock signal.