1. An image recording device, comprising:
a support member configured and arranged to support a sheet-shaped print medium;
a print head configured and arranged to move between a print position, at which printing of an image onto the print medium is executed, and a retracted position, at which a tension of the print medium is altered, the retracted position being farther away from the support member than the print position, while also facing the support member, with the print medium interposed therebetween;
a tension adjustment unit configured and arranged to adjust the tension of the print medium being supported by the support member; and
a control unit operatively coupled to the print head and the tension adjustment unit, the control unit being configured to control the print head to move to the retracted position and to control the tension adjustment unit to alter the tension of the print medium while the print head is positioned at the retracted position, and the control unit being further configured to control the print head to move to the print position and to execute printing by the print head while the print head is positioned at the print position with the tension of the print medium being adjusted to a print tension by the tension adjustment unit.
2. The image recording device as set forth in claim 1, wherein:
the control unit elevates the tension of the print medium to the print tension in the state where the print head has been positioned at the retracted position, and thereafter moves the print head to the print position to execute printing.
3. The image recording device as set forth in claim 1, wherein:
when the printing by the print head is concluded, the control unit moves the print head to the retracted position and thereafter reduces the tension of the print medium from the print tension.
4. The image recording device as set forth in claim 1, further comprising:
a conveyor unit for conveying the print medium,
wherein:
the control unit executes the printing on the print medium being conveyed by the conveyor unit.
5. The image recording device as set forth in claim 4, wherein:
the control unit positions the print head at the retracted position whenever the conveyor unit is to change the conveyance speed of the print medium.
6. The image recording device as set forth in claim 5, further comprising:
a tension detection unit for detecting the tension of the print medium,
wherein:
the control unit confirms, by a detection result from the tension detection unit, that the tension of the print medium after the conveyance speed has been changed has stabilized, and thereafter moves the print head to the print position to execute printing.
7. The image recording device as set forth in claim 6, wherein:
when the printing by the print head is concluded, the control unit moves the print head to the retracted position, and thereafter causes the conveyor unit to reduce the conveyance speed of the print medium.
8. The image recording device as set forth in claim 5, wherein:
the control unit positions the print head at the retracted position while the conveyance speed is being changed, and also moves the print head to the print position to execute printing once the conveyance speed of the print medium, after the conveyance speed has been changed, has stabilized.
9. The image recording device as set forth in claim 8, wherein:
the support member is a cylindrical-shaped support drum for supporting the print medium while the print medium is wound therearound, and rotates while being driven by the print medium being conveyed by the conveyor unit.
10. The image recording device as set forth in claim 9, further comprising:
a rotation detection unit for detecting the rotation of the support drum,
wherein:
the control unit confirms, by a detection result from the rotation detection unit, that the conveyance speed of the print medium has stabilized, and thereafter moves the print head to the print position to execute printing.
11. An image recording method comprising:
orienting a print head, having been positioned at a print position, so as to face a support member, with a sheet-shaped print medium supported by the support member being interposed therebetween, and then causing the print head to execute printing of an image onto the print medium; and
altering a tension of the print medium, either before or after the print step, in a state where the print head has been positioned at a retracted position while also facing the support member with the print medium interposed therebetween, at which a tension of the print medium is altered, the retracted position being farther away from the support member than the print position.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method for manufacturing a thin film transistor substrate comprising thin film transistors,
each of the thin film transistors comprising:
a semiconductor film portion formed on an insulating substrate;
a gate insulating film portion laminated on the semiconductor film portion;
a gate made of a metal film portion formed on the gate insulating film portion; and
a channel formed in a region covered by the gate, which is formed of the semiconductor film portion,
the thin film transistor substrate comprising:
an n-type thin film transistor having regions of the semiconductor film portion, which are not covered by the gate and to which n-type impurities are doped, the regions becoming a source and a drain;
a p-type thin film transistor having regions of the semiconductor film portion, which are not covered by the gate and to which p-type impurities are doped, the regions becoming a source and a drain; and
a capacitor including:
a lower capacitor electrode formed in a region of another semiconductor film portion, to which the n-type impurities are doped, the another semiconductor film portion being formed on the same layer as the semiconductor film portion;
an upper capacitor electrode made of a metal film portion; and
another insulating film portion formed on the same layer as the gate insulating film portion to be interposed between the lower capacitor electrode and the upper capacitor electrode,
the method comprising:
processing the gate of the n-type thin film transistor, the gate of the p-type thin film transistor, and the upper capacitor electrode by using a first mask and a second mask; and
changing impurity concentrations of semiconductor film portions located in regions which become the channel of the n-type thin film transistor, the source and the drain of the n-type thin film transistor, the channel of the p-type thin film transistor, the source and the drain of the p-type thin film transistor, and the lower capacitor electrode, by using a pattern of the first mask and a pattern of the second mask,
the first mask being a half-tone mask having a transparent region, an opaque region, and a semitransparent region,
the second mask having a transparent region and an opaque region,
wherein boundaries between the channel of the n-type thin film transistor and the source and the drain of the n-type thin film transistor, and boundaries between the channel of the p-type thin film transistor and the source and the drain of the p-type thin film transistor are defined by boundaries other than a boundary between the opaque region and the semitransparent region of the half-tone mask or a boundary between the opaque region and the transparent region of the half-tone mask.
2. A method for manufacturing a thin film transistor substrate comprising thin film transistors,
each of the thin film transistors comprising:
a semiconductor film portion formed on an insulating substrate;
a gate insulating film portion laminated on the semiconductor film portion;
a gate made of a metal film portion formed on the gate insulating film portion; and
a channel formed in a region covered by the gate, which is formed of the semiconductor film portion,
the thin film transistor substrate comprising:
an n-type thin film transistor having regions of the semiconductor film portion, which are not covered by the gate and to which n-type impurities are doped, the regions becoming a source and a drain;
a p-type thin film transistor having regions of the semiconductor film portion, which are not covered by the gate and to which p-type impurities are doped, the regions becoming a source and a drain; and
a capacitor including:
a lower capacitor electrode formed in a region of another semiconductor film portion, to which the n-type impurities are doped, the another semiconductor film portion being formed on the same layer as the semiconductor film portion;
an upper capacitor electrode made of a metal film portion; and
another insulating film portion formed on the same layer as the gate insulating film portion to be interposed between the lower capacitor electrode and the upper capacitor electrode,
the method comprising:
processing the gate of the n-type thin film transistor, the gate of the p-type thin film transistor, and the upper capacitor electrode by using a first mask and a second mask;
forming the channel of the n-type thin film transistor and the channel of the p-type thin film transistor in regions which are half-exposed with the first mask and unexposed with the second mask;
forming the source and the drain of the n-type thin film transistor in regions which are half-exposed with the first mask and exposed with the second mask;
forming the source and the drain of the p-type thin film transistor in regions which are exposed with the first mask and unexposed with the second mask; and
forming the lower capacitor electrode in a region which is unexposed with the first mask and exposed with the second mask,
the first mask being a half-tone mask having a transparent region, an opaque region, and a semitransparent region,
the second mask having a transparent region and an opaque region.
3. A method for manufacturing a thin film transistor substrate comprising thin film transistors,
each of the thin film transistors comprising:
a semiconductor film portion formed on an insulating substrate; and
a gate insulating film portion laminated on the semiconductor film portion,
the thin film transistor substrate comprising:
an n-type thin film transistor including:
a first gate made of a metal film portion formed on the gate insulating film portion;
a channel formed in a region covered by the first gate, which is formed of the semiconductor film portion; and
a source and a drain formed in regions of the semiconductor film portion, which are not covered by the first gate and to which n-type impurities are doped;
a p-type thin film transistor including:
a second gate made of a metal film portion formed on the gate insulating film portion;
a channel formed in a region covered by the second gate, which is formed of the semiconductor film portion; and
a source and a drain formed in regions of the semiconductor film portion, which are not covered by the second gate and to which p-type impurities are doped; and
a capacitor including:
a lower capacitor electrode formed in a region of another semiconductor film portion, to which the n-type impurities are doped, the another semiconductor film portion being formed on the same layer as the semiconductor film portion;
an upper capacitor electrode made of a metal film portion; and
another insulating film portion formed on the same layer as the gate insulating film portion to be interposed between the lower capacitor electrode and the upper capacitor electrode,
the method comprising:
processing the first gate of the n-type thin film transistor, the second gate of the p-type thin film transistor, and the upper capacitor electrode by using a first mask and a second mask;
forming the channel of the n-type thin film transistor in a region which is half-exposed with the first mask and unexposed with the second mask;
forming the source and the drain of the n-type thin film transistor in regions which are half-exposed with the first mask and exposed with the second mask;
forming the channel of the p-type thin film transistor in a region which is exposed with the first mask and unexposed with the second mask;
forming the source and the drain of the p-type thin film transistor in regions which are exposed with the first mask and exposed with the second mask; and
forming the lower capacitor electrode in a region which is unexposed with the first mask and exposed with the second mask,
the first mask being a half-tone mask having a transparent region, an opaque region, and a semitransparent region,
the second mask having a transparent region and an opaque region.
4. A method for manufacturing a thin film transistor substrate comprising thin film transistors,
each of the thin film transistors comprising:
a semiconductor film portion formed on an insulating substrate; and
a gate insulating film portion laminated on the semiconductor film portion,
the thin film transistor substrate comprising:
an n-type thin film transistor including:
a first gate made of a metal film portion formed on the gate insulating film portion;
a channel formed in a region covered by the first gate, which is formed of the semiconductor film portion; and
a source and a drain formed in regions of the semiconductor film portion, which are not covered by the first gate and to which n-type impurities are doped;
a p-type thin film transistor including:
a second gate made of a metal film portion formed on the gate insulating film portion;
a channel formed in a region covered by the second gate, which is formed of the semiconductor film portion; and
a source and a drain formed in regions of the semiconductor film portion, which are not covered by the second gate and to which p-type impurities are doped; and
a capacitor including:
a lower capacitor electrode formed in a region of another semiconductor film portion, to which the n-type impurities are doped, the another semiconductor film portion being formed on the same layer as the semiconductor film portion;
an upper capacitor electrode made of a metal film portion; and
another insulating film portion formed on the same layer as the gate insulating film portion to be interposed between the lower capacitor electrode and the upper capacitor electrode,
the method comprising:
processing the first gate of the n-type thin film transistor, the second gate of the p-type thin film transistor, and the upper capacitor electrode by using a first mask and a second mask;
forming the channel of the n-type thin film transistor in a region which is unexposed with the first mask and unexposed with the second mask;
forming the source and the drain of the n-type thin film transistor in regions which are unexposed with the first mask and exposed with the second mask;
forming the channel of the p-type thin film transistor in a region which is half-exposed with the first mask and unexposed with the second mask;
forming the source and the drain of the p-type thin film transistor in regions which are half-exposed with the first mask and exposed with the second mask; and
forming the lower capacitor electrode in a region which is exposed with the first mask and unexposed with the second mask,
the first mask being a half-tone mask having a transparent region, an opaque region, and a semitransparent region,
the second mask having a transparent region and an opaque region.
5. A method for manufacturing a thin film transistor substrate comprising thin film transistors,
each of the thin film transistors comprising:
a semiconductor film portion formed on an insulating substrate; and
a gate insulating film portion laminated on the semiconductor film portion,
the thin film transistor substrate comprising:
an n-type thin film transistor including:
a first gate made of a metal film portion formed on the gate insulating film portion;
a channel formed in a region covered by the first gate, which is formed of the semiconductor film portion; and
a source and a drain formed in regions of the semiconductor film portion, which are not covered by the first gate and to which n-type impurities are doped;
a p-type thin film transistor including:
a second gate made of a metal film portion formed on the gate insulating film portion;
a channel formed in a region covered by the second gate, which is formed of the semiconductor film portion; and
a source and a drain formed in regions of the semiconductor film portion, which are not covered by the second gate and to which p-type impurities are doped; and
a capacitor including:
a lower capacitor electrode formed in a region of another semiconductor film portion, to which the n-type impurities are doped, the another semiconductor film portion being formed on the same layer as the semiconductor film portion;
an upper capacitor electrode made of a metal film portion; and
another insulating film portion formed on the same layer as the gate insulating film portion to be interposed between the lower capacitor electrode and the upper capacitor electrode,
the method comprising:
processing the first gate of the n-type thin film transistor, the second gate of the p-type thin film transistor, and the upper capacitor electrode by using a first mask and a second mask;
forming the channel of the n-type thin film transistor in a region which is half-exposed with the first mask and unexposed with the second mask;
forming the source and the drain of the n-type thin film transistor in regions which are half-exposed with the first mask and exposed with the second mask;
forming the channel of the p-type thin film transistor in a region which is unexposed with the first mask and unexposed with the second mask;
forming the source and the drain of the p-type thin film transistor in regions which are unexposed with the first mask and exposed with the second mask; and
forming the lower capacitor electrode in a region which is exposed with the first mask and unexposed with the second mask,
the first mask being a half-tone mask having a transparent region, an opaque region, and a semitransparent region,
the second mask having a transparent region and an opaque region.