What is claimed is:
1. A direct conversion communication system, comprising:
a first gain stage that amplifies selected signals among received signals having a carrier frequency;
a demodulation-mixer that mixes the received amplified carrier frequency selected signals and outputs baseband selected signals;
a baseband amplification circuit that includes a plurality of gain stages that receive the baseband selected signals and selectively amplify in-channel signals to a prescribed amplitude; and
a gain controller coupled to receive outputs of the gain stages and to control each of the gain stages, wherein the gain controller controls distributed gain among the gain stages to achieve a prescribed total gain.
2. The communications system of claim 1, wherein the gain controller operates said each of the gain stages in a corresponding linearity range.
3. The communications system of claim 1, wherein an adjacent channel in the baseband selected signals has a greater power level than the in-channel signals upon input to the plurality of gain stages.
4. The communications system of claim 1, wherein the total gain is controlled by a baseband modem and the gain controller to increase a SNR of the system.
5. The communications system of claim 1, further comprising:
an AD converting unit that converts the selected in-channel signals from the last gain stage of the plurality of gain stages into digital signals; and
a modem gain control circuit that monitors gain of the digital signals received from the AGC and outputs a control signal to the gain controller.
6. The communication system of claim 5, wherein a preset distributed gain level is compared to an actual gain of the digital signals to determine a process error in the gain stages.
7. The communication system of claim 5, wherein the gain controller receives the control signal to change the total gain, and wherein the gain controller distributes the change in the total gain over the gain stages.
8. The communication system of claim 7, wherein the gain controller implements the change in the total gain by adjusting at least one gain stage of the gain stages into a linearity range.
9. The communication system of claim 7, wherein the gain controller implements the change in the total gain by adjusting one of a gain stage closest to an antenna and an initial gain stage of the plurality of gain stages by a prescribed gain step.
10. The communication system of claim 1, wherein the gain controller implements a two tiered gain control, wherein the first tier is implemented in a selected gain stage only once in a prescribed time interval, and wherein the second tier is implemented independent of the prescribed time interval.
11. The communication system of claim 1, further comprising:
an antenna that receives the signals having the carrier frequency;
a RF filter coupled to the antenna that filters the received selected signals;
an AD converting unit that converts the selected signals from a last gain stage of the plurality of gain stages into digital signals; and
a discrete-time signal processing unit that receives the digital signals.
12. A method of operating a communication system, comprising:
receiving signals including selected signals having a carrier frequency;
first amplifying the received selected signals;
detecting a first output level of the first amplified selected signals;
mixing the first amplified selected signals to output demodulated selected signals having a frequency reduced from the carrier frequency;
second amplifying the demodulated selected signals until the selected signals reach a prescribed criteria;
detecting a second output level of the second amplified selected signals;
digitizing the second amplified selected signals;
determining an amplification amount of the digitized selected signals and generating a gain control signal responsive thereto; and
controlling a gain distributed among the first and second amplifying according to the gain control signal and the first and second output levels.
13. The method of claim 12, wherein the second amplifying comprises sequentially amplifying the selected signals not less than twice, and wherein the first and second output levels are power levels.
14. The method of claim 12, wherein the controlling the gain comprises implementing a gain control of one of the first amplifying and the second amplifying by a single prescribed amount.
15. The method of claim 14, wherein the prescribed amount is one of an increase and a decrease implemented as early as possible prior to digitizing.
16. The method of claim 12, wherein the second amplifying comprises sequentially amplifying the selected signals in a plurality of gain stages, wherein the controlling the gain comprises implementing a gain control of one of the first amplifying and a selected one of the sequentially amplifying the selected signals that is out of an assigned corresponding range of amplification.
17. The method of claim 16, further comprising:
filtering the received selected signals;
low pass filtering each output of the sequentially amplifying steps except for a final sequentially amplifying step;
AD converting the sequentially amplified selected signals into digital signals; and
discrete-time signal processing the digital signals.
18. The method of claim 12, wherein the communication system is one of a cellular phone, a personal digital assistant, an internet appliance, and remote control device and a laptop computer.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A semiconductor device comprising:
a semiconductor chip upon which are disposed roughly upon a straight line a plurality of bonding pads containing a first region as a connection region and a second region for making contact with a testing probe, and said first and second regions are lined up in a direction perpendicular to said straight line,
a member provided with a plurality of conductors containing a third region as a connection region electrically connected to each of a plurality of external connection terminals and a securing area for securing said semiconductor chip,
a plurality of conductor wires that electrically connect said first regions of said plurality of bonding pads to said third regions of said plurality of conductors, and
an encapsulating member that encapsulates said semiconductor chip and said plurality of conductor wires.
2. The semiconductor device according to claim 1 wherein said plurality of bonding pads comprise first bonding pads provided with said first regions toward the edge of said semiconductor chip and second bonding pads provided with said second regions toward the edge of said semiconductor chip, and said first and second bonding pads are disposed alternately roughly upon a straight line.
3. The semiconductor device according to claims 1 or 2 wherein said plurality of bonding pads are rectangular in shape with their with their short sides lying in a direction along the edges of said semiconductor chip.
4. The semiconductor device according to claims 1 or 2 wherein said plurality of bonding pads are formed with the width of said first region being wider than the width of said second region in the direction along the edges of said semiconductor chip.
5. The semiconductor device according to claims 1 or 2 wherein said plurality of bonding pads have notches between said first region and said second region.
6. The semiconductor device according to any of claims 1, 2, 3, 4 or 5 wherein said member is an insulating substrate upon one surface of which said semiconductor chip is secured by adhesive, said external connection terminals are roughly spherical terminals formed on the other surface of said substrate, said encapsulating member is resin that encapsulates said semiconductor chip and said plurality of conductor wires on one surface of said substrate, and the lands as said third regions are electrically connected to said roughly spherical terminals via through holes.
7. A method of manufacturing semiconductor devices comprising:
a step wherein a semiconductor chip upon which are disposed roughly upon a straight line a plurality of bonding pads containing a first region as a connection region and a second region for making contact with a testing probe, and said first and second regions are lined up in a direction perpendicular to said straight line, and a member provided with a plurality of conductors containing a third region as a connection region electrically connected to each of a plurality of external connection terminals and a securing area for securing said semiconductor chip are secured, and
a step wherein a plurality of conductor wires electrically connect said first regions of said plurality of bonding pads to said third regions of said plurality of conductors.
8. The method of manufacturing semiconductor devices according to claim 7 wherein said plurality of bonding pads comprise first bonding pads provided with said first regions toward the edge of said semiconductor chip and second bonding pads provided with said second regions toward the edge of said semiconductor chip, and said first and second bonding pads are disposed alternately roughly upon a straight line.
9. The method of manufacturing semiconductor devices according to claim 8 wherein said connection step comprises: a first step wherein said first region of said plurality of first bonding pads are connected by conductor wire to said third regions of said plurality of conductors, and a second step wherein said first region of said plurality of second bonding pads are connected by conductor wire to said third regions of said plurality of conductors.
10. The method of manufacturing semiconductor devices according to any of claims 7, 8 or 9, further comprising a step wherein, prior to said securing step, testing of said semiconductor chip is performed by putting test probes into contact with the second regions of said plurality of bonding pads.