1. A power supplying control method of a computer system having a first power supply and a second power supply both providing a first specific voltage to a motherboard, comprising steps of:
detecting whether the first power supply and the second power supply are at a stable state by a power translating board, whereien the power translating board has a first timing control circuit conneced to a first switch circuit and a second timing control circuit connected to a second switch circuit;
outputting a first enable signal to the first switch circuit by the first timing control circuit and outputting the first specific voltage to a first pin by the first switch circuit when the first power supply is at the stable state;
outputting a second enable signal to the second switch circuit by the second timing control circuit and outputting the first specific voltage to the first pin by the second switch circuit when the second power supply is at the stable state; and
outputting the first specific voltage to the motherboard via the first pin.
2. The method according to claim 1 wherein the first power supply is determined at the stable state when the first power supply generates a first power-good signal; and the second power supply is determined at the stable state when the second power supply generates a second power-good signal.
3. The method according to claim 1 further comprising steps of:
controlling the first switch circuit for outputting the first specific voltage to the first pin when the first power supply is at the stable state; and
controlling the second switch circuit for outputting the first specific voltage to the first pin when the second power supply is at the stable state.
4. The method according to claim 1 wherein the first power supply and the second power supply start to build the first specific voltage after receiving a power on signal.
5. The method according to claim 1 wherein the first specific voltage is +3V, +5V, or +12V.
6. A power supply system adopting two power supplies connected in parallel, comprising:
a first power supply comprising a first voltage-output terminal;
a second power supply comprising a second voltage-output terminal;
a first switch circuit comprising an input terminal connected to the first voltage-output terminal;
a second switch circuit comprising an input terminal connected to the second voltage-output terminal;
a first timing control circuit comprising an input terminal for receiving a first power-good signal outputted by the first power supply and an output terminal connected to an enable terminal of the first switch circuit;
a second timing control circuit comprising an input terminal for receiving a second power-good signal outputted by the second power supply and an output terminal connected to an enable terminal of the second switch circuit; and
a plug comprising a first pin connected to an output terminal of the first switch circuit and an output terminal of the second switch circuit;
wherein the first voltage-output terminal and the second voltage-output terminal both are capable of outputting a first specific voltage.
7. The power supply system adopting two power supplies connected in parallel according to claim 6 wherein the plug further comprises a second pin, and a power on signal outputted from a motherboard is transmitted to the first power supply and the second power supply via the second pin.
8. The power supply system adopting two power supplies connected in parallel according to claim 6 further comprising a third switch circuit, a fourth switch circuit, and a logic gate, wherein the logic gate comprises a first input terminal connected to an output terminal of the third switch circuit, a second input terminal connected to an output terminal of the fourth switch circuit, and an output terminal connected to a third pin of the plug; the third switch circuit comprises an input terminal connected to the first power supply for receiving the first power-good signal; and the fourth switch circuit comprises an input terminal connected to the second power supply for receiving the second power-good signal.
9. The power supply system adopting two power supplies connected in parallel according to claim 8 wherein the first switch circuit, the second switch circuit, the first timing control circuit, the second timing control circuit, the third switch circuit, the fourth switch circuit, and the logic gate are designed on a power translating board.
10. The power supply system adopting two power supplies connected in parallel according to claim 8 wherein the third switch circuit comprises an enable terminal connected to the first timing control circuit, and the third switch circuit can be activated by the first timing control circuit according to the power-good signal outputted from the first power supply; the fourth switch circuit comprises an enable terminal connected to the second timing control circuit, and the fourth switch circuit can be activated by the second timing control circuit according to the power-good signal outputted from the second power supply.
11. The power supply system adopting two power supplies connected in parallel according to claim 6 wherein the specific voltage outputted from the first voltage-output terminal is +3V, +5V, or +12V.
12. The power supply system adopting two power supplies connected in parallel according to claim 6 wherein the plug is a 24-pin plug, a 4-pin plug, a VGA plug, or a HD plug.
13. The power supply system adopting two power supplies connected in parallel according to claim 6 wherein the first switch circuit further comprises: a switch comprising an input terminal being the input terminal of the first switch circuit, an output terminal being the output terminal of the first switch circuit, and a control terminal; and a detect circuit comprising a first detect terminal connected to the input terminal of the first switch circuit and a second detect terminal connected to the output terminal of the first switch circuit, wherein a control signal is outputted from the detect circuit to the control terminal; wherein the switch is connected if the voltage at the first detect terminal is greater than the voltage at the second detect terminal; or the switch is disconnected if the voltage at the first detect terminal is not greater than the voltage at the second detect terminal.
14. The power supply system adopting two power supplies connected in parallel according to claim 13 wherein the voltage of the control signal is greater than the first specific voltage.
15. A computer comprising a power supply system adopting two power supplies connected in parallel, comprising:
a first power supply comprising a first voltage-output terminal;
a second power supply comprising a second voltage-output terminal, wherein the first voltage-output terminal and the second voltage-output terminal are capable of outputting a first specific voltage;
a first switch circuit comprising an input terminal connected to the first voltage-output terminal;
a second switch circuit comprising an input terminal connected to the second voltage-output terminal;
a third switch circuit comprising an input terminal for receiving a first power-good signal outputted by the first power supply;
a fourth switch circuit comprising an input terminal for receiving a second power-good signal outputted by the second power supply;
a first timing control circuit comprising an input terminal for receiving the first power-good signal and an output terminal connected to an enable terminal of the first switch circuit;
a second timing control circuit comprising an input terminal for receiving the second power-good signal and an output terminal connected to an enable terminal of the second switch circuit;
a plug comprising a first pin connected to an output terminal of the first switch circuit and an output terminal of the second switch circuit;
a logic gate comprises a first input terminal connected to an output terminal of the third switch circuit, a second input terminal connected to an output terminal of the fourth switch circuit, and an output terminal connected to a second pin of the plug for outputting a third power good signal; and
a motherboard comprising a jack connected to the plug, wherein the first specific voltage is inputted to the motherboard via the first pin of the plug and the third power-good signal is inputted to the motherboard via the second pin of the plug.
16. The computer comprising a power supply system adopting two power supplies connected in parallel according to claim 15 wherein the plug further comprises a third pin, wherein a power on signal is transmitted from the motherboard to the first power supply and the second power supply via the third pin.
17. The computer comprising a power supply system adopting two power supplies connected in parallel according to claim 15 wherein the first switch circuit, the second switch circuit, the first timing control circuit, the second timing control circuit, the third switch circuit, the fourth switch circuit, and the logic gate are designed on a power translating board.
18. The computer comprising a power supply system adopting two power supplies connected in parallel according to claim 15 wherein the first voltage is +3V, +5V, or +12V.
19. The computer comprising a power supply system adopting two power supplies connected in parallel according to claim 15 wherein the first switch circuit further comprises: a switch comprising an input terminal being the input terminal of the first switch circuit, an output terminal being the output terminal of the first switch circuit, and a control terminal; and a detect circuit comprising a first detect terminal connected to the input terminal of the first switch circuit and a second detect terminal connected to the output terminal of the first switch circuit, wherein a control signal is outputted from the detect circuit to the control terminal; wherein the switch is connected if the voltage at the first detect terminal is greater than the voltage at the second detect terminal; or the switch is disconnected if the voltage at the first detect terminal is not greater than the voltage at the second detect terminal.
20. The computer comprising a power supply system adopting two power supplies connected in parallel according to claim 19 wherein the voltage of the control signal is greater than the first specific voltage.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method for removing water from an alkylation process system, said method comprising the steps of:
alkylating an olefin with a first isoparaffin in the presence of an alkylation catalyst mixture comprising HF and water in an alkylation reactor thereby producing an alkylate product and an ASO reaction by-product;
passing an alkylation reaction effluent comprising said alkylate product, said ASO reaction by-product and said alkylation catalyst mixture from said alkylation reactor to a separator for separating said alkylation reaction effluent into a hydrocarbon phase comprising said alkylate product, and an alkylation catalyst mixture phase comprising said alkylation catalyst mixture and at least a portion of said ASO reaction by-product;
passing at least a portion of said alkylation catalyst mixture phase to a re-run column for contact with an upwardly flowing gas stream comprising a hydrocarbon selected from the group consisting of a second isoparaffin, a paraffin, and combinations thereof, to provide a re-run column bottoms stream comprising at least a portion of said ASO reaction by-product, and a re-run column overhead stream comprising HF, at least a portion of said gas stream and water;
passing a portion of said re-run column overhead stream to said separator;
providing a water removal column comprising a bottom section, an intermediate section, and a top section;
using a portion of said re-run column overhead stream as a bottoms feed to said bottom section of said water removal column;
upwardly flowing a stripping stream comprising the vaporous portion of said bottoms feed up to said intermediate section and said top section;
condensing water out of the material entering into said top section to form a condensed stream comprising water;
downwardly flowing said condensed stream from said top section to said intermediate section and said bottom section;
contacting said upwardly flowing stripping stream with said downwardly flowing condensed stream in said intermediate section and said bottom section to thereby strip HF and hydrocarbons from said condensed stream into said stripping stream; and to thereby condense and transfer water contained in said stripping stream to said condensed stream;
passing a water removal column overhead stream comprising hydrocarbons and HF from said top section to said separator;
removing a water removal column bottom effluent comprising water from said bottom section.
2. A method in accordance with claim 1 wherein a re-run column side draw stream is removed from said re-run column at a location between the locations for removal of said re-run column bottoms stream and said re-run column overhead stream; and wherein said re-run column side draw stream comprises a portion of said gas stream, HF, water and contaminants selected from the group consisting of amides, oxygenates, sulfides and aromatics.
3. A method in accordance with claim 1 wherein said water removal column bottom effluent comprises water and HF, and wherein the mass ratio of HF to water in said water removal column bottom effluent is less than about 7.
4. A method in accordance with claim 3 wherein said mass ratio of HF to water in said water removal column bottom effluent is less than about 6.
5. A method in accordance with claim 3 wherein said mass ratio of HF to water in said water removal column bottom effluent is less than about 5.
6. A method in accordance with claim 1 wherein a portion of said re-run column overhead stream is charged to said water removal column at a location just below said intermediate section as an intermediate section feed.
7. A method in accordance with claim 6 wherein the vaporous portion of said intermediate section feed joins with and becomes a part of said stripping stream upwardly flowing to said intermediate section and said top section.
8. A method in accordance with claim 6 wherein said top section has a top section temperature, and wherein the amount of water removed from said alkylation process system in said water removal column bottom effluent is controlled by a procedure selected from the group consisting of: 1) altering said top section temperature; 2) altering the flow rate of said bottoms feed; 3) altering the flow rate of said intermediate section feed; and 4) combinations thereof.
9. A method in accordance with claim 8 wherein said intermediate section feed has an intermediate section feed temperature, said water removal column overhead stream has a water removal column overhead stream temperature, wherein a target overhead temperature for said water column overhead stream is established; and wherein said top section temperature is adjusted in response to said intermediate section feed temperature and said water column overhead stream temperature in order to move said water column overhead stream temperature toward said target overhead temperature.
10. A method in accordance with claim 8 wherein said intermediate section feed has an intermediate section feed temperature; wherein said water removal column overhead stream has a water removal column overhead stream temperature; wherein a target differential temperature between said water column overhead stream temperature and said intermediate section feed temperature is established; and wherein said top section temperature is adjusted in response to said intermediate section feed temperature and said water column overhead stream temperature in order to move the differential temperature between the water column overhead stream temperature and the intermediate section feed temperature toward said target differential temperature.
11. A method in accordance with claim 1 wherein said alkylation catalyst mixture further comprises a volatility reducing additive; and wherein said alkylation catalyst mixture phase and said re-run column bottoms stream each further comprise at least a portion of said volatility reducing additive.
12. A method in accordance with claim 11 wherein said volatility reducing additive is a sulfone.
13. A method in accordance with claim 1 wherein said intermediate section and said bottom section each contain a mass transfer medium for contacting said condensed liquid with said stripping stream.
14. A method in accordance with claim 13 wherein said mass transfer medium is selected from the group consisting of distillation trays, distillation packing, and combinations thereof.
15. A method in accordance with claim 1 wherein said top section contains a condenser for condensing water out of said material entering into said top section and forming said condensed liquid.
16. A method in accordance with claim 15 wherein said condenser comprises at least one conduit through which cooling water is passed.
17. A method in accordance with claim 16 wherein the amount of water condensed out of said material entering said top section is controlled by a procedure selected from the group consisting of: 1) adjusting the flow rate of said cooling water; 2) adjusting the temperature of said cooling water; and 3) combinations thereof.