1. An observation method using a microscopic imaging device which has a solid-state imaging device having a plurality of pixels arranged at predetermined intervals, each of the pixels including a microlens configured to collect light, and a light receiving unit configured to receive the light collected by the microlens, comprising:
mounting an object to be observed on the microlenses or above the microlenses by disposing a specimen containing the object to be observed on the microscopic imaging device; and
imaging the object to be observed, mounted on the microlenses or above the microlenses by the solid-state imaging device.
2. The observation method using a microscopic imaging device according to claim 1,
wherein, when an interval between the pixels is denoted by P, and a viewing angle of the microlens is denoted by \u03b8, the object to be observed is mounted on the microlenses or above the microlenses so that a distance between the microlens and the object to be observed is not more than P(2\xd7tan \u03b8).
3. The observation method using a microscopic imaging device according to claim 2, the observation method further comprising:
obtaining a voltage signal by imaging the object to be observed by the solid-state imaging device,
obtaining an image signal by performing desired signal processing on the voltage signal, the desired signal processing including color correction processing, noise correction processing, and image quality correction processing, excluding lens aberration correction processing and shading correction processing, and
displaying an image of the object to be observed based on the image signal.
4. The observation method using a microscopic imaging device according to claim 1,
wherein the microscopic imaging device has, on the microlenses, an examination container having a plurality of recessed portions provided to extend from a surface of the examination container in a thickness direction, and
the object to be observed is mounted above the microlenses by disposing the specimen in each of the recessed portions.
5. The observation method using a microscopic imaging device according to claim 4,
wherein, when an interval between the pixels is denoted by P, and a viewing angle of the microlens is denoted by \u03b8 in the solid-state imaging device, each of the plurality of recessed portions is provided to extend from the surface of the examination container in the thickness direction within a range not more than P(2\xd7tan \u03b8).
6. The observation method using a microscopic imaging device according to claim 1,
wherein the microscopic imaging device includes
a path provided on the microlenses, the path configured to expose the microlenses in the path, and
a filter provided at an inlet of the path, the filter configured to pass the object to be observed, and
the object to be observed is mounted on the microlenses or above the microlenses by circulating the specimen in the path through the filter.
7. The observation method using a microscopic imaging device according to claim 6,
wherein, when an interval between the pixels is denoted by P, and a viewing angle of the microlens is denoted by \u03b8 in the solid-state imaging device, the path has a diameter of less than P(2\xd7tan \u03b8).
8. The observation method using a microscopic imaging device according to claim 1,
wherein the microscopic imaging device is provided to a flow path so that the microlenses is exposed in the flow path, and
the object to be observed is mounted on the microlenses or above the microlenses by circulating the specimen in the flow path.
9. The observation method using a microscopic imaging device according to claim 8,
wherein, when an interval between the pixels is denoted by P, and a viewing angle of the microlens is denoted by \u03b8 in the solid-state imaging device, the flow path has a diameter of less than P(2\xd7tan \u03b8).
10. The observation method using a microscopic imaging device according to claim 1,
wherein the microscopic imaging device has a stage portion provided on the microlenses of the solid-state imaging device, and
the object to be observed is mounted on the stage portion or above the stage portion.
11. The observation method using a microscopic imaging device according to claim 10,
wherein, when an interval between the pixels is denoted by P, and a viewing angle of the microlens is denoted by \u03b8, the object to be observed is mounted on the stage portion or above the stage portion so that a distance between the microlens and the object to be observed is not more than P(2\xd7tan \u03b8).
12. The observation method using a microscopic imaging device according to claim 10, the observation method further comprising:
obtaining a voltage signal by imaging the object to be observed by the solid-state imaging device,
obtaining an image signal by performing desired signal processing on the voltage signal, the desired signal processing including color correction processing, noise correction processing, and image quality correction processing, excluding lens aberration correction processing and shading correction processing, and
displaying an image of the object to be observed based on the image signal.
13. The observation method using a microscopic imaging device according to claim 10,
wherein the microscopic imaging device has an insulation sheet on a surface of the stage portion, and
the object to be observed is mounted on the insulation sheet or above the insulation sheet.
14. The observation method using a microscopic imaging device according to claim 13,
wherein, when an interval between the pixels is denoted by P, and a viewing angle of the microlens is denoted by \u03b8, the object to be observed is mounted on the insulation sheet on the surface of the stage portion having a thickness of less than P(2\xd7tan \u03b8) or above the insulation sheet.
15. The observation method using a microscopic imaging device according to claim 10,
wherein the microscopic imaging device has, on a surface of the stage portion, an examination container having a plurality of recessed portions provided to extend from a surface of the examination container in a thickness direction, and
the object to be observed is mounted above the stage portion by disposing the specimen in each of the recessed portions.
16. The observation method using a microscopic imaging device according to claim 15,
wherein, when an interval between the pixels is denoted by P, and a viewing angle of the microlens is denoted by \u03b8 in the solid-state imaging device, each of the plurality of recessed portions is provided to extend from a surface of the examination container in a thickness direction within a range not more than P(2\xd7tan \u03b8).
17. The observation method using a microscopic imaging device according to claim 10,
wherein the microscopic imaging device includes
a path provided on a surface of a surface of the stage portion, the path configured to expose the surface of the stage portion in the path, and
a filter provided at an inlet of the path, the filter configured to pass the object to be observed, and
the object to be observed is mounted on stage portion or above the stage portion by circulating the specimen in the path through the filter.
18. The observation method using a microscopic imaging device according to claim 17,
wherein, when an interval between the pixels is denoted by P, and a viewing angle of the microlens is denoted by \u03b8 in the solid-state imaging device, the path has a diameter of less than P(2\xd7tan \u03b8).
19. The observation method using a microscopic imaging device according to claim 10,
wherein the microscopic imaging device is provided to a flow path so that the stage portion is exposed in the flow path, and
the object to be observed is mounted on the stage portion or above the stage portion by circulating the specimen in the flow path.
20. The observation method using a microscopic imaging device according to claim 19,
wherein, when an interval between the pixels is denoted by P, and a viewing angle of the microlens is denoted by \u03b8 in the solid-state imaging device, the flow path has a diameter of less than P(2\xd7tan \u03b8).
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A semiconductor package, comprising:
a substrate;
a plurality of electrical conductors on a surface of the substrate for conducting electrical current between a die and a plurality of solderballs; and
a protective layer formed on the surface of the substrate for protecting the electrical conductors, the protective layer comprising a test electrical conductor.
2. The semiconductor package of claim 1, wherein the protective layer has a peripheral edge and at least a part of the electrical conductor is disposed proximate the peripheral edge.
3. The semiconductor package of claim 2, wherein the protective layer has plural peripheral edges and the test electrical conductor forms a loop, at least a substantial portion thereof being disposed proximate the plural peripheral edges.
4. The semiconductor package of claim 1, wherein the substrate has a first region in which terminals for the plurality of electrical conductors are disposed, and the protective layer has a second region disposed adjacent the first region, at least a part of the test electrical conductor being disposed proximate the second region.
5. The semiconductor package of claim 4, wherein the test electrical conductor forms a loop around at least a part of the second region.
6. The semiconductor package of claim 1, wherein the test electrical conductor comprises a first test electrical conductor, the protective layer further comprising a second test electrical conductor, and wherein the protective layer has a peripheral edge and at least a part of a first one of the first and second electrical conductors is disposed proximate the peripheral edge, and wherein the substrate has a first region in which terminals for the plurality of electrical conductors are disposed, and the protective layer has a second region disposed adjacent the first region, at least a part of a second one of the first and second electrical conductors being disposed proximate the second region.
7. The semiconductor package of claim 1, wherein the test electrical conductor comprises a first and second ends, each of which are connected to copper pad terminals for application of a voltage thereto.
8. The semiconductor package of claim 1, wherein the test electrical conductor comprises a first end and a second end, the first end being connected to a first via in the substrate and the second end being connected to a second via in the substrate, the first via and the second via each being arranged for connection to respective solderballs.
9. A method of assembling a semiconductor package, the semiconductor package comprising:
a substrate;
a plurality of electrical conductors on a surface of the substrate, the plurality of electrical conductors being for conducting electrical current between a die and a plurality of solderballs; and
a protective layer formed on the surface of the substrate for protecting the electrical conductors;
the method comprising providing the protective layer with a test electrical conductor.
10. The method assembling a semiconductor package of claim 9, wherein the protective layer has a peripheral edge and the method comprises providing at least a part of the electrical conductor disposed proximate the peripheral edge.
11. The method assembling a semiconductor package of claim 10, wherein the protective layer has plural peripheral edges and the method comprises providing the test electrical conductor to form a loop, at least a substantial portion thereof being disposed proximate the plural peripheral edges
12. The method assembling a semiconductor package of claim 9, wherein the substrate has a first region in which terminals for the plurality of electrical conductors are disposed, and the protective layer has a second region disposed adjacent the first region, the method comprising providing at least a part of the test electrical conductor disposed proximate the second region.
13. The method assembling a semiconductor package of claim 12, the method comprising providing the test electrical conductor to form a loop around at least a part of the second region.
14. The method assembling a semiconductor package of claim 9, wherein the test electrical conductor comprises a first test electrical conductor, and the method further comprises providing the protective layer with a second test electrical conductor, wherein the protective layer has a peripheral edge, the method further comprising providing at least a part of a first one of the first and second electrical conductors disposed proximate the peripheral edge, and wherein the substrate has a first region in which terminals for the plurality of electrical conductors are disposed, and the protective layer has a second region disposed adjacent the first region, the method further comprising providing at least a part of a second one of the first and second electrical conductors disposed proximate the second region.
15. The method assembling a semiconductor package of claim 9, wherein the test electrical conductor comprises a first end and a second end, the method comprising connecting of the first and second ends to copper pad terminals for application of a voltage thereto.
16. The method assembling a semiconductor package of claim 9, wherein the test electrical conductor comprises a first end and second end, the method further comprising connecting the first end to a first via in the substrate and the second to a second via in the substrate, the first via and the second via each being arranged for connection to respective solderballs.
17. An integrated circuit package, comprising:
a substrate including a wire layout pattern and a solder mask layer;
an integrated circuit attached to a surface of the substrate and electrically connected to the wire layout pattern;
encapsulating material covering at least the integrated circuit and the solder mask layer;
a plurality of crack seal rings formed on the solder mask surface, wherein the crack seal rings comprise copper traces, and wherein the plurality of crack seal rings includes a first ring, at least a portion of which is formed proximate an edge of the solder mask layer, for detecting solder mask cracks and a second ring, at least a portion of which is formed proximate the wire layout pattern, for detecting delamination between the encapsulation material and the solder mask surface; and
a plurality of terminals connected to the crack seal rings for permitting electrical connection to the crack seal rings.
18. The integrated circuit of claim 17, wherein the plurality of crack seal rings are formed on the solder mask surface with a sputtering process.
19. The integrated circuit of claim 17, wherein the plurality of terminals comprise solderballs.
20. The integrated circuit of claim 17, wherein the plurality of terminals comprises plated copper pads.