What is claimed is:
1. A method comprising:
obtaining second data from a multilevel cell memory and first data, wherein said first data is different from said second data;
comparing said first data with said second data;
programming the multilevel cell memory based, at least in part, on said comparison of said first data and said second data; and
wherein said obtaining, comparing, and programming are used to test the multilevel cell memory.
2. The method of claim 1, wherein programming the multilevel cell memory comprises:
accessing a plurality of memory cells in the multilevel cell memory; and
determining a number of bits from said memory cells of said first data that need programming.
3. The method of claim 2, comprising enabling loading of said first data in the plurality of memory cells based, at least in part, on the determined number of bits from said memory cell of said first data.
4. The method of claim 1, comprising:
after programming a plurality of memory cells in the multilevel cell memory, verifying the levels to which said all bits in said second data are programmed at substantially the same bandwidth as programming a number of bits per memory cell of said first data.
5. The method of claim 1, comprising programming fewer bits per memory cell of said first data than said all of a number of bits available per memory cell of said first data.
6. The method of claim 1, comprising storing said first data in a data buffer.
7. The method of claim 1, comprising accessing said first data by loading all bits per memory cell of said first data into a programmable element.
8. A method comprising:
storing first data at a programmable element associated with a multilevel cell memory;
reading second data from a memory array associated with the multilevel cell memory by accessing a plurality of memory cells in said memory array; and
comparing said first data with said second data before programming the plurality of memory cells.
9. The method of claim 8, wherein programming the multilevel cell memory comprises determining a number of bits from said memory cells of said first data that need programming.
10. The method of claim 9, comprising enabling loading of said first data in the plurality of memory cells based, at least in part, on the determined number of bits from said memory cells of said first data.
11. A method comprising:
programming a multilevel cell memory device to replace first data stored in the device with second data, the programming including comparing the first data to the second data; and
monitoring the programming to test the cell.
12. The method of claim 11, wherein programming the multilevel cell memory comprises determining a number of bits from said memory cell of said first data that need programming.
13. An article comprising a storage medium storing instructions readable by a processor-based system that, when executed by a processor causes the processor to:
obtain first data;
obtain second data from a multilevel cell memory different from said first data, wherein said first data and said second data include a plurality of bits;
compare said first data with said second data; and
program the multilevel cell memory based, at least in part, on said comparison of said first data and said second data.
14. The article of claim 13, comprising a storage medium storing instructions readable by a processor-based system that, when executed by a processor causes the processor to:
access a plurality of memory cells in the multilevel cell memory; and
determine a number of bits from said memory cells of said first data that need programming.
15. The article of claim 14, comprising a storage medium storing instructions readable by a processor-based system that, when executed by a processor causes the processor to:
enable loading of said first data in the plurality of memory cells based, at least in part, on the determined number of bits from said memory cells of said first data.
16. The article of claim 13, comprising a storage medium storing instructions readable by a processor-based system that, when executed by a processor causes the processor to:
verify the levels to which said all of the bits in said second data are programmed at substantially the same bandwidth as programming the number of bits per memory cell of said first data.
17. The article of claim 13, comprising a storage medium storing instructions readable by a processor-based system that, when executed by a processor causes the processor to:
program fewer bits per memory cell of said first data than said all of the number of bits available per memory cell of said first data.
18. The article of claim 13, comprising a storage medium storing instructions readable by a processor-based system that, when executed by a processor causes the processor to:
store said first data in a data buffer.
19. An article comprising a storage medium storing instructions readable by a processor-based system that, when executed by a processor causes the processor to:
store first data at a programmable element associated with a multilevel cell memory;
read second data from a memory array associated with the multilevel cell memory by accessing a plurality of memory cells in said memory array; and
compare said first data with said second data before the processor programs the plurality of memory cells.
20. The article of claim 19, comprising a storage medium storing instructions readable by a processor-based system that, when executed by a processor causes the processor to program the multilevel cell memory by determining a number of bits from said memory cells of said first data that need programming.
21. The article of claim 20, comprising a storage medium storing instructions readable by a processor-based system that, when executed by a processor causes the processor to enable loading of said first data in the plurality of memory cells based, at least in part, on the determined number of bits from said memory cells of said first data.
22. An article comprising a storage medium storing instructions readable by a processor-based system that, when executed by a processor causes the processor to:
program a multilevel cell memory device to replace first data stored in the device with second data, the programming including comparing the first data to the second data; and
monitor the programming to test the cell.
23. The article of claim 22, comprising a storage medium storing instructions readable by a processor-based system that, when executed by a processor causes the processor in programming the multilevel cell memory to determine a number of bits from said memory cells of said first data that need programming.
24. A system comprising:
a programmable element associated with a multilevel cell memory, wherein the programmable element stores first data;
a memory array associated with the multilevel cell memory, wherein said memory array includes a plurality of memory cells that store second data; and
comparison logic, wherein said comparison logic compares said first data and said second data before programming the plurality of memory cells.
25. The system of claim 24, wherein programming the multilevel cell memory comprises determining a number of bits per memory cell of said first data that need programming.
26. A communication system comprising:
an application processor;
a baseband processor coupled via a bus to the application processor, the baseband processor coupled to receive a wireless communicated signal;
a static random access memory coupled to the baseband processor; and
a multilevel cell flash memory coupled to the application processor, where the multilevel cell flash memory includes,
a programmable element associated with the multilevel cell flash memory, wherein the programmable element stores first data;
a memory array associated with the multilevel cell flash memory, wherein said memory array includes a plurality of flash memory cells that store second data; and
comparison logic, wherein said comparison logic compares said first data and said second data before programming the plurality of flash memory cells.
27. The system of claim 26, wherein programming the multilevel cell flash memory comprises determining a number of bits from said flash memory cells of said first data that need programming.
28. A system comprising:
a storage logic storing first data;
a multilevel cell memory storing second data, wherein said first data is different from said second data;
comparison logic comparing said first data with said second data;
programming logic for programming the multilevel cell memory based, at least in part, on said comparison of said first data and said second data; and
wherein said storage logic, multilevel cell memory, comparison logic, and programming logic are used to test the multilevel cell memory.
29. The system of claim 28, wherein programming the multilevel cell memory comprises:
accessing a plurality of memory cells in the multilevel cell memory; and
determining a number of bits from said memory cells of said first data that need programming.
30. The system of claim 29, comprising enabling loading of said first data in the plurality of memory cells based, at least in part, on the determined number of bits from said memory cells of said first data.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
I claim:
1. An apparatus comprising:
a skid steering type vehicle comprised of a plurality of wheels; and
a bypass device;
wherein the bypass device allows an operator to steer the combination of the skid steering type vehicle and the bypass device without substantial dragging of any of the wheels of the skid steering type vehicle.
2. The apparatus of claim 1 wherein:
the bypass device includes a first wheel which is part of a wheel device;
the plurality of wheels of the skid steering type vehicle includes a first wheel;
the bypass device can cause the first wheel of the bypass device to contact a ground surface and to bear at least part of the weight of the skid steering type vehicle, while the first wheel of the skid steering type vehicle is not bearing any weight of the skid steering type vehicle.
3. The apparatus of claim 2 wherein:
the plurality of wheels of the skid steering type vehicle includes a second wheel and a body portion wherein the body portion of the skid steering type vehicle is located between the first wheel and the second wheel of the skid steering type vehicle;
the bypass device can cause the first wheel of the bypass device to contact a ground surface and to bear at least part of the weight of the skid steering type vehicle, while the first and the second wheel of the skid steering type vehicle are not bearing any weight of the skid steering type vehicle.
4. The apparatus of claim 2 wherein:
the wheel device of the bypass device is rotatably connected to the skid steering type vehicle.
5. The apparatus of claim 4 wherein:
the first wheel of the bypass device is part of a wheel device which is connected by a hinge to the skid steering type vehicle;
and the wheel device can be lifted off of and taken out of contact with the ground surface.
6. The apparatus of claim 2 wherein
the bypass device is further comprised of a rod, having first and second ends, the first end of the rod being rotatably connected to the skid steering type vehicle and the second end of the rod being rotatably connected to the wheel device.
7. The apparatus of claim 6 wherein
the rod is connected to a device which can raise or lower the rod and thereby raise or lower the wheel device of the bypass device.
8. The apparatus of claim 7 wherein
the device which can raise or lower the rod uses hydraulics.
9. The apparatus of claim 7 wherein:
the wheel device of the bypass device includes a plate, having first and second ends, the first end of the plate being rotatably connected to the skid steering type vehicle and the second end of the plate being rotatably connected to the second end of the rod;
wherein the first wheel of the bypass device can swivel with respect to the plate of the wheel device of the bypass device.
10. The apparatus of claim 2 wherein:
the bypass device includes a second wheel which is part of a wheel device;
the plurality of wheels of the skid steering type vehicle includes a second wheel;
the bypass device can cause the first wheel and the second wheel of the bypass device to contact a ground surface and to bear at least part of the weight of the skid steering type vehicle, while the first wheel and the second wheel of the skid steering type vehicle are not bearing any weight of the skid steering type vehicle.
11. The apparatus of claim 1 wherein:
the skid steering type vehicle includes a load end and a non-load end;
wherein the bypass device is connected to the skid steering type vehicle at the non-load end.
12. A method comprising the steps of:
operating a skid steering type vehicle having a plurality of wheels so that one or more of the wheels are dragged in order to steer the skid steering type vehicle;
lifting up a first wheel of the skid steering type vehicle and using a first wheel of a bypass device to allow the combination of the bypass device and the skid steering type vehicle to be steered without dragging any of the plurality of wheels of the skid steering type vehicle and without dragging the first wheel of the bypass device.
13. The method of claim 12 further comprising
lifting up a second wheel of the skid steering type vehicle wherein the skid steering type vehicle includes a body portion and wherein the body portion is located between the first wheel and the second wheel of the skid steering type vehicle.
14. The method of claim 13 wherein
the first and second wheel of the skid steering type vehicle are located at a non-load end of the skid steering type vehicle.
15. The method of claim 12 further comprising the steps of
lowering the first and second wheels of the skid steering type vehicle so that can the skid steering type vehicle can be steered only by dragging one or more of the plurality of wheels of the skid steering type vehicle;
and lifting up the first wheel of the bypass device so that the first wheel of the bypass device does not bear any weight of the skid steering type vehicle.
16. The method of claim 12 wherein:
the first wheel of the bypass device is part of a wheel device which is rotatably connected to the skid steering type vehicle;
and the wheel device can be lifted off of and taken out of contact with the ground surface.
17. The method of claim 16 wherein
the bypass device is further comprised of a rod, having first and second ends, the first end of the rod being rotatably connected to the skid steering type vehicle and the second end of the rod being rotatably connected to the wheel device.
18. The method of claim 17 wherein
the rod is connected to a device which can raise or lower the rod and thereby raise or lower the wheel device of the bypass device.
19. The method of claim 18 wherein:
the wheel device of the bypass device includes a plate, having first and second ends, the first end of the plate being rotatably connected to the skid steering type vehicle and the second end of the plate being rotatably connected to the second end of the rod;
wherein the first wheel of the bypass device can swivel with respect to the plate of the wheel device of the bypass device.
20. An apparatus comprising:
a skid steering type vehicle comprised of a plurality of tracks; and
a bypass device;
wherein the bypass device allows an operator to steer the combination of the skid steering type vehicle and the bypass device without substantial dragging of any of the tracks of the skid steering type vehicle.