1. A method, comprising:
integrating an inductor thereinto a multilevel wiring network, wherein said multilevel wiring network pertains to a semiconductor integrated circuit;
forming said inductor from a planar magnetic core and a conductive winding; and
turning said conductive winding around in generally spiral manner on the outside of said planar magnetic core.
2. The method of claim 1, wherein said multilevel wiring network is arranged into wiring planes, and wherein said planar magnetic core has a principal plane, said method further comprises:
orienting said principal plane in parallel with said wiring planes; and
constructing said conductive winding piecewise of wire segments and of Vertical Interconnect Access-s (VIAs), wherein said wire segments pertain to at least two of said wiring planes and said VIAs are interconnecting said at least two wiring planes.
3. The method of claim 2, wherein said method further comprises:
forming a plurality of said inductors;
forming planar couplers for magnetic coupling between said planar magnetic cores of said plurality of said inductors;
arranging said planar magnetic cores and said planar couplers in said principal plane in the manner of a ladder having rungs and stringers, wherein each of said planar magnetic cores corresponds to one of said rungs and each of said planar couplers corresponds to one of said stringers.
4. The method of claim 3, wherein said method further comprises:
forming said planar magnetic cores and said planar couplers with the same chemical composition, and in such manner that said planar magnetic cores and said planar couplers are differing portions of a single planar structure thereof.
5. The method of claim 1, wherein said method further comprises:
forming said planar magnetic core in a laminated configuration, wherein said laminated configuration comprises at least one layer of a magnetic material and at least one non-magnetic layer.
6. The method of claim 5, wherein said magnetic material comprises CoXZrYTa1-X-Y.
7. The method of claim 5, wherein said non-magnetic layer is capable to prevent electrical current circulating perpendicularly to said principal plane in said planar magnetic core.
8. The method of claim 1, wherein said planar magnetic core has a hard-axis of magnetization, wherein said hard-axis is aligned substantially in parallel with a magnetic field that is induced when an electrical current is flowing in said conductive winding.
9. A method, comprising:
integrating an inductor thereinto a multilevel wiring network, wherein said multilevel wiring network is arranged into wiring planes;
forming said inductor from a planar magnetic core and a conductive winding, wherein said planar magnetic core has a principal plane;
orienting said principal plane in parallel with said wiring planes;
turning said conductive winding around in generally spiral manner on the outside of said planar magnetic core; and
constructing said conductive winding piecewise of wire segments and of Vertical Interconnect Access-s (VIAs), wherein said wire segments pertain to at least two of said wiring planes and said VIAs are interconnecting said at least two wiring planes.
10. The method of claim 9, wherein said method further comprises:
forming a plurality of said inductors;
forming planar couplers for magnetic coupling between said planar magnetic cores of said plurality of said inductors;
arranging said planar magnetic cores and said planar couplers in said principal plane in the manner of a ladder having rungs and stringers, wherein each of said planar magnetic cores corresponds to one of said rungs and each of said planar couplers corresponds to one of said stringers.
11. A method, comprising:
depositing by high-vacuum (HV) sputtering a layer of a magnetic material to a thickness between about 10 nm and 1000 nm;
disposing an insulating layer over said layer of said magnetic material;
repeating in alternate fashion said depositing step and said disposing step up to about 100 times each, resulting in a magnetic member with a laminated configuration;
masking and patterning for said magnetic member in such manner that after said patterning a remaining portion of said magnetic member comprises a planar magnetic core; and
wherein said method is characterized as fabricating a planar inductor suitable for integrating into a multilevel wiring network that is arranged into wiring planes, wherein said inductor comprises said planar magnetic core.
12. The method of claim 11, wherein in said disposing step said magnetic material is oxidized, wherein forming said insulating layer.
13. The method of claim 11, wherein said method further comprises selecting a material for said insulating layer in such manner that said insulating layer is commonly etchable with said layer of said magnetic material.
14. The method of claim 13, wherein said magnetic material comprises CoXZrYTa1-X-Y. and said material for said insulating layer comprises CoO.
15. The method of claim 11, wherein said steps of masking and patterning comprise a liftoff process.
16. The method of claim 11, wherein said steps of masking and patterning comprise developing a positive photoresist over said magnetic member and etching away an unneeded portion of said magnetic member.
17. A method, comprising:
depositing a conductive seed layer;
disposing a masking layer over said conductive seed layer, and patterning an opening into said masking layer;
electrodepositing a magnetic layer to a thickness between about 10 nm and 1000 nm into said opening, wherein said conductive seed layer completes a path for the electrodeposition current;
electrodepositing a current rectifying layer over said a magnetic layer;
repeating in alternate fashion said electrodepositing said magnetic layer step and said electrodepositing said current rectifying layer step up to about 100 times each;
removing said masking layer whereby exposing portion of said conductive seed layer, and removing said exposed portion of said conductive seed layer, wherein leaving behind a magnetic formation with a laminated configuration, wherein said magnetic formation comprises a planar magnetic core; and
wherein said method is characterized as fabricating a planar inductor suitable for integrating into a multilevel wiring network that is arranged into wiring planes, wherein said inductor comprises said planar magnetic core.
18. The method of claim 17, wherein said current rectifying layer comprises at least one Schottky diode.
19. The method of claim 17, wherein said current rectifying layer comprises at least one semiconductor p-n junction.
20. The method of claim 17, wherein said magnetic layer comprises CoXZrYTa1-X-Y.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A ferroelectric element comprising:
a first electrode;
a ferroelectric film formed on the first electrode;
a second electrode formed on the ferroelectric film;
a first hydrogen blocking film formed directly on a surface of the second electrode;
a first insulation film formed on the first hydrogen blocking film;
a first opening formed in the first hydrogen blocking film and exposing a part of the second electrode;
a second opening formed having a greater diameter than a diameter of the first opening, in the first insulation film; and
an interconnect film connected to the second electrode through the first and second openings.
2. A ferroelectric element according to claim 1, wherein the first and second openings each have a diameter substantially constant with respect to the axial direction thereof.
3. A ferroelectric element according to claim 2, wherein the first and second openings are formed by different processes from each other.
4. A ferroelectric element according to claim 3, wherein the first opening is formed in the hydrogen blocking film prior to forming the first insulation film.
5. A ferroelectric element according to claim 2, wherein the first opening has an aspect ratio of 1 or smaller.
6. A ferroelectric element according to claim 1, wherein the first and second openings are formed to have a diameter increasing with distance from the second electrode.
7. A ferroelectric element according to claim 6, wherein the first and second openings are formed in one process.
8. A ferroelectric element according to claim 6, wherein the first insulation film has a second hydrogen blocking film formed at the second opening and a second insulation film formed around the second hydrogen blocking film.
9. A ferroelectric element according to claim 8, wherein the first and second openings are formed in a self-aligned fashion by etching back.