1. A method comprising:
forming a dielectric layer over a first region and a second region of a substrate;
forming a first metal layer directly on the dielectric layer in the first and second regions;
forming a second metal layer directly on the first metal layer in the first and second regions;
forming a protection layer over the metal layer in the first and second regions;
removing a first portion of the protection layer in the second region to expose the second metal layer in the second region;
removing the exposed second metal layer in the second region;
removing the protection layer in the first region to expose the second metal layer in the first region; and
forming a third metal layer directly on the exposed second metal layer in the first region and directly on the first metal layer in the second region.
2. The method of claim 1, further comprising removing a second portion of the protection layer in the second region to expose the first portion of the protection layer in the second region.
3. The method of claim 2, wherein removing the first portion of the protection layer includes performing a first etching process and wherein removing the second portion of the protection layer in the second region to expose the first portion of the protection layer in the second region includes performing a second etching process that is different than the first etching process.
4. The method of claim 1, wherein the second metal layer includes a first type work function metal layer and wherein the third metal layer includes a second type work function metal layer that is opposite the first type function metal layer.
5. The method of claim 1, wherein removing the protection layer in the first region to expose the second metal layer in the first region includes performing a chemical mechanical polishing process to remove the protection layer in the first region.
6. The method of claim 1, wherein removing the protection layer in the first region to expose the second metal layer in the first region includes performing an etching process to remove the protection layer in the first region.
7. A method comprising:
forming a high-k dielectric layer over a first region and a second region of a substrate;
forming a metal layer over the first high-k dielectric layer in the first and second regions;
forming a protection layer over the metal layer in the first and second regions of the substrate;
removing a portion of the protection layer in the second region such that the protection layer has a first thickness in the first region and a second thickness in the second region that is different than the first thickness;
after removing the portion of the protection layer in the second region, removing a remaining portion of the protection layer in the second region to expose the metal layer in the second region;
removing the exposed metal layer in the second region of the substrate;
removing the protection layer in the first region to expose to the metal layer in the first region; and
forming another metal layer directly on the exposed metal layer in the first region and over the high-k dielectric layer in the second region.
8. The method of claim 7, further comprising forming a barrier metal layer over the high-k dielectric layer in the first and second regions of the substrate prior to forming the protection layer over the metal layer in the first and second regions of the substrate.
9. The method of claim 8, wherein forming the another metal layer directly on the exposed metal layer in the first region and over the high-k dielectric layer in the second region further includes forming the another metal layer directly on the barrier metal layer in the second region of substrate.
10. The method of claim 7, wherein the protection layer includes an oxide material.
11. The method of claim 7, wherein the protection layer includes silicon.
12. The method of claim 7, wherein the metal layer includes a first type work function metal layer and wherein the another metal layer includes a second type work function metal layer that is opposite the first type function metal layer.
13. The method of claim 7, wherein removing the exposed metal layer from the second region of the substrate occur prior to removing the protection layer in the first region to expose to the metal layer in the first region.
14. A method of fabricating a semiconductor device, comprising:
forming a metal layer on a semiconductor substrate;
forming a protection layer on the metal layer;
removing a portion of the protection layer to provide a first region having a first thickness and a second region having a second thickness, wherein the first region is underlying a photoresist masking element;
removing the photoresist masking element;
removing the second region of the protection layer from the substrate after removing the photoresist masking element; and
patterning the metal layer using the first region of the protection layer.
15. The method of claim 14, wherein the second thickness is approximately 30 and 50 Angstroms.
16. The method of claim 14, wherein the patterning the metal layer includes forming at least a portion of a metal gate.
17. A method of claim 14, further comprising:
depositing a high-k dielectric layer on the semiconductor substrate underlying the metal layer.
18. The method of claim 14, wherein the protection layer includes an oxide.
19. The method of claim 18, wherein the protection layer is selected from the group consisting of: include spin-on glass (SOG), teraethoxysilane (TEOS), PE-oxide, and HARP oxide.
20. The method of claim 14, wherein the protection layer includes silicon.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A multi-stage RF power amplifier comprising;
a first power amplifier stage configured to amplify an input signal to generate an amplified output signal;
a second power amplifier stage; and
a circuit coupled to the first and second power amplifier stages, wherein the circuit is configured to generate a feedback signal using the input and output signals of the first power amplifier stage, and wherein the circuit is configured to control the DC bias level of the second power amplifier stage.
2. The multi-stage RF power amplifier of claim 1, wherein the DC bias level is generated so as to cause the DC levels of the input and output signals of the first power amplifier stage to have a predetermined relationship.
3. The multi-stage RF power amplifier of claim 1, wherein the DC bias level is controlled to cause the DC levels of the input and output signals of the first power amplifier stage to be approximately equal.
4. The multi-stage RF power amplifier of claim 1, wherein the feedback signal is generated based on the DC levels of the input and output signals of the first power amplifier stage.
5. The multi-stage multi-stage RF power amplifier of claim 4, wherein the feedback signal is generated by comparing the DC levels of the input and output signals of the first power amplifier stage.
6. The multi-stage RF power amplifier of claim 1, wherein the feedback signal is used to set the DC levels at the input and output of the first power amplifier stage to approximately half of the supply voltage.
7. The multi-stage RF power amplifier of claim 1, wherein the second power amplifier stage is adapted to receive an RF input signal.
8. A method of operating an RF power amplifier having multiple power amplifier stages, comprising;
providing a first power amplifier stage configured to amplify an input signal to generate an amplified output signal;
providing a second power amplifier stage; and
controlling the DC bias level of a second power amplifier stage based on the input and output signals of the first power amplifier stage.
9. The method of claim 8, wherein the DC bias level is generated to cause the DC levels at the input and output of the first power amplifier stage to have a predetermined relationship.
10. The method of claim 8, wherein the DC bias level is generated to cause the DC levels at the input and output of the first power amplifier stage to be approximately equal.
11. The method of claim 8, further comprising generating a feedback signal based on the input and output signals of the first power amplifier stage, wherein the DC bias level of a second power amplifier stage is controlled by the feedback signal.
12. The method of claim 11, wherein the feedback signal is generated based on the DC level at the input and output of the first power amplifier stage.
13. The method of claim 12, wherein the feedback signal is generated by comparing the DC levels at the input and output of the first power amplifier stage.
14. The method of claim 12, wherein the feedback signal is used to set the DC levels at the input and output of the first power amplifier stage to approximately half of the supply voltage.
15. The method of claim 8, wherein the second power amplifier stage is adapted to receive an RF input signal.
16. A method of establishing DC bias levels in an RF power amplifier having multiple power amplifier stages, comprising:
providing a first power amplifier stage having an input and an output;
sensing the DC bias level of the input of the first power amplifier stage;
sensing the DC bias level of the output of the first power amplifier stage;
generating a signal based on the sensed DC bias levels of the input and output of the first power amplifier stage; and
using the generated signal to control the DC bias level of the second power amplifier stage.
17. The method of claim 16, wherein the DC bias level of the second power amplifier stage is controlled to cause the DC levels at the input and output of the first power amplifier stage to have a predetermined relationship.
18. The method of claim 16, wherein the DC bias level of the second power amplifier stage is controlled to cause the DC levels at the input and output of the first power amplifier stage to be approximately equal.
19. The method of claim 16, wherein the generated signal is generated by comparing the sensed DC bias levels at the input and output of the first power amplifier stage.
20. The method of claim 16, wherein the second power amplifier stage is adapted to receive an RF input signal.