What is claimed is:
1. A heat-dissipating module for being used in a system, comprising:
a heat-dissipating device; and
a terminal mounted and fixed on one side of said heat-dissipating device and electrically connected with said heat-dissipating device, wherein as said heat-dissipating module is inserted into a frame of said system, said terminal will be received by a receptacle inside said system such that said heat-dissipating module will be electrically connected to said system.
2. The heat-dissipating module according to claim 1 wherein said heat-dissipating device is an axial-flow fan.
3. The heat-dissipating module according to claim 1 wherein said terminal is electrically connected with said heat-dissipating device by one way selected from a group consisting of wires, weldings, contacts, and pins.
4. The heat-dissipating module according to claim 1 wherein said terminal includes a plurality of pins to be inserted in holes of said receptacle for electrically connecting said heat-dissipating module with said system.
5. The heat-dissipating module according to claim 1 further comprising a securing device mounted on said one side of said heat-dissipating device for fixing said terminal.
6. The heat-dissipating module according to claim 5 wherein said securing device is assembled with said heat-dissipating device by one way selected from a group consisting of screws, rivets, adhesives and engaging members.
7. The heat-dissipating module according to claim 5 wherein said securing device is an L-shaped structure.
8. The heat-dissipating module according to claim 5 wherein said securing device includes a bracket extending outwardly from a side thereof for disposing said terminal thereon.
9. The heat-dissipating module according to claim 5 wherein said securing device further has a plurality of elastic pieces respectively mounted on a plurality of retaining holes formed on a surface thereof such that as said heat-dissipating module is inserted into said frame of said system and a housing of said system is covered on said frame, said plurality of elastic pieces will urge against said housing of said system for fixing said heat-dissipating module in said frame.
10. A heat-dissipating module for being used in a system, comprising:
a plurality of heat-dissipating devices;
a securing device mounted on sides of said plurality of heat-dissipating devices for assembling said plurality of heat-dissipating devices together; and
a terminal mounted and fixed on said securing device and electrically connected with each of said plurality of heat-dissipating devices, wherein when said heat-dissipating module is inserted into a frame of said system, said heat-dissipating module will be electrically connected to said system through said terminal.
11. The heat-dissipating module according to claim 10 wherein said terminal is electrically connected with said plurality of heat-dissipating devices by one way selected from a group consisting of wires, weldings, contacts and pins.
12. The heat-dissipating module according to claim 10 wherein said securing device is an L-shaped structure.
13. The heat-dissipating module according to claim 10 wherein said securing device is assembled with said plurality of heat-dissipating devices by one way selected from a group consisting of screws, rivets, adhesives and engaging members.
14. The heat-dissipating module according to claim 10 wherein said securing device further has a plurality of elastic pieces respectively mounted on a plurality of retaining holes formed on a surface thereof such that as said heat-dissipating module is inserted into said frame of said system and a housing of said system is covered on said frame, said plurality of elastic pieces will urge against said housing of said system for fixing said heat-dissipating module in said frame.
15. The heat-dissipating module according to claim 10 wherein said heat-dissipating module is inserted into said frame of said system through a tray to be electrically connected with said system.
16. The heat-dissipating module according to claim 15 wherein said tray is separated into a plurality of compartments by a plurality of supports for respectively disposing a plurality of said heat-dissipating modules therein.
17. The heat-dissipating module according to claim 16 wherein said tray further includes a plurality of terminal receivers to be mounted on each of said plurality of supports such that when each of said plurality of heat-dissipating modules is inserted into said tray, said terminal will be received by said terminal receiver for electrically connecting said heat-dissipating module with said system.
18. The heat-dissipating module according to claim 10 wherein said tray is fixed to said frame by a manner selected from a group consisting of screws, rivets and engaging members.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A device comprising:
a substrate;
a first waveguide comprising polycrystalline silicon positioned on the substrate;
a first optical resonator comprising polycrystalline silicon positioned on the substrate;
a first doped semiconducting region comprising polycrystalline silicon positioned proximate to the first optical resonator; and
a second doped semiconducting region comprising polycrystalline silicon positioned proximate to the first optical resonator;
wherein the first optical resonator is communicatively coupled to the first waveguide.
2. The device of claim 1, wherein the first doped semiconducting region is a p-type semiconducting region, and the second doped semiconducting region is an n-type semiconducting region.
3. The device of claim 2, wherein the p-type semiconducting region comprises silicon doped with one or more of boron, aluminum, or gallium.
4. The device of claim 2, wherein the n-type semiconducting region comprises silicon doped with one or more of phosphorus, arsenic, or antimony.
5. The device of claim 2, wherein the first optical resonator is doped with a background doping.
6. The device of claim 5, wherein the background doping has a concentration of between 1011 and 1018 charge carriers per square centimeter, and the p-type semiconducting region and the n-type semiconducting region are doped with a concentration of between 1014 and 1022 charge carriers per square centimeter.
7. The device of claim 1, wherein the first optical resonator comprises polycrystalline silicon background doped with a background donor dopant, the first doped semiconducting region comprises polycrystalline silicon doped with an acceptor dopant at a higher density than the background donor dopant in the first optical resonator, and the second doped semiconducting region comprises polycrystalline silicon doped with a donor dopant at a higher density than the background donor dopant in the first optical resonator.
8. The device of claim 1, further comprising a first conductive contact connected to the first doped semiconducting region, and a second conductive contact connected to the second doped semiconducting region.
9. The device of claim 8, further comprising an insulating layer disposed over the first optical resonator, the first doped semiconducting region, the second doped semiconducting region, and the first waveguide, wherein the first conductive contact and the second conductive contact extend through the insulating layer.
10. The device of claim 8, further comprising a metal interconnect layer connected to the first conductive contact and the second conductive contact.
11. The device of claim 1, wherein the first optical resonator comprises a ring resonator, the first doped semiconducting region is positioned interior to the ring resonator, and the second doped semiconducting region and the first waveguide are positioned exterior to the ring resonator.
12. The device of claim 1, wherein the first optical resonator comprises at least one of a ring resonator, a microdisk, or a photonic crystal.
13. The device of claim 1, wherein the first waveguide has a cross-sectional dimension within a range of 100 to 2,000 nanometers.
14. The device of claim 1, further comprising additional photonic structures in a system for multiplexing data in one or more of time, phase, amplitude, or wavelength.
15. The device of claim 1, further comprising one or more additional optical resonators that are coupled to the first waveguide and that are comprised, with the first optical resonator, in an array of optical resonators.
16. The device of claim 15, wherein the optical resonators in the array have a plurality of different radii, thereby enabling multiplexing data in multiple wavelengths in the first waveguide.
17. The device of claim 15, wherein the array comprises tuning mechanisms associated with a plurality of the optical resonators that enable the optical resonators to be in communication with the first waveguide at different times, thereby enabling time multiplexing in the first waveguide.
18. The device of claim 1, wherein the substrate is formed from at least one of silicon, germanium, or a compound semiconductor.
19. The device of claim 1, wherein the first optical resonator is positioned vertically proximate to the first waveguide on different deposited layers of the substrate.
20. The device of claim 1, further comprising a tuning mechanism based on at least one of an electrical, thermal, magnetic, photoelectric or microfluidic effect.
21. The device of claim 1, wherein the first waveguide is formed at least mostly from at least one of polycrystalline silicon, silicon nitride, or hydrogenated amorphous silicon.
22. The device of claim 1, further comprising a second waveguide positioned on the substrate, wherein the first optical resonator is also communicatively coupled to the second waveguide, such that the device may function as a switch between the first waveguide and the second waveguide.
23. A method comprising:
providing an insulating base layer;
forming an amorphous semiconductor layer on the base layer;
modifying at least a portion of the amorphous semiconductor layer into a polycrystalline semiconductor layer;
background doping a target area of the polycrystalline semiconductor layer;
forming a waveguide and a resonator in the polycrystalline semiconductor layer, comprising at least one step of lithography andor etching, wherein the resonator is formed in the background doped target area;
forming a p-type region in the polycrystalline semiconductor layer proximate to the resonator, comprising at least one step of applying a p-type dopant; and
forming an n-type region in the polycrystalline semiconductor layer proximate to the resonator, comprising at least one step of applying an n-type dopant.
24. The method of claim 23, wherein forming the amorphous semiconductor layer on the base layer comprises depositing amorphous silicon using low pressure chemical vapor deposition.
25. The method of claim 23, wherein modifying at least a portion of the amorphous semiconductor layer into a polycrystalline semiconductor layer comprises annealing the amorphous semiconductor layer, wherein the annealing comprises applying a laser with a wavelength of less than or equal to 400 nanometers and a pulse period of less than or equal to 200 nanoseconds to the amorphous semiconductor layer.
26. The method of claim 23, further comprising annealing the polycrystalline semiconductor layer after forming the waveguide, the resonator, the p-type region, and the n-type region in the polycrystalline semiconductor layer, wherein annealing the polycrystalline semiconductor layer comprises baking the polycrystalline semiconductor layer for two or more periods at temperatures within a range of 600 to 1,050 degrees Celsius.
27. The method of claim 23, wherein background doping the target area of the polycrystalline semiconductor layer comprises using phosphorus ion implantation;
applying the p-type dopant for forming the p-type region comprises using boron difluoride implantation; and applying the n-type dopant for forming the n-type region comprises using phosphorus ion implantation.
28. The method of claim 23, wherein the amorphous semiconductor layer is formed with a thickness within a range of 100 to 500 nanometers, and wherein forming the resonator comprises etching the polycrystalline semiconductor layer to form slabs with a thickness within a range of 25 to 75 nanometers defining an exterior of the resonator.
29. The method of claim 23, further comprising: providing an insulating cladding on the polycrystalline semiconductor layer; forming vias in contact with the p-type region and the n-type region through the insulating cladding; and forming conductive contacts on surfaces of the vias.