1. A method for diagnosing an increased risk of preeclampsia in a subject, the method comprising
a) detecting a level of HIF-1\u03b1 in a fluid sample from the subject; and
b) comparing the level detected in the subject’s fluid sample to a control level obtained from samples of the same fluid taken at the same time of pregnancy from women who did not develop preeclampsia;
wherein an increased level of HIF-1\u03b1 in the fluid sample from the subject over that of a control level obtained from samples of the same fluid taken at the same time of pregnancy from women who did not develop preeclampsia indicates an increased risk of preeclampsia.
2. A method for diagnosing or identifying an increased risk of preeclampsia in a subject, the method comprising:
a) contacting a fluid sample from a subject at a first time in pregnancy with a diagnostic reagent that measures a first level of HIF-1\u03b1; and
b) diagnosing or identifying an increased risk of preeclampsia in the subject based upon an increased level of HIF-1\u03b1 in the fluid sample from the subject over that of
(i) a first control level of HIF-1\u03b1 obtained from samples of the same fluid taken at the same time of pregnancy from women who did not develop preeclampsia; or
(ii) an earlier sample level of HIF-1\u03b1 obtained from samples of the same fluid taken from the same subject at an earlier time in the pregnancy.
3. A method according to claim 2, wherein the levels of HIF-1\u03b1 are measured by detecting, directly or indirectly, the interaction of the HIF-1\u03b1 with an antibody specific for HIF-1\u03b1.
4. A method according to claim 3, wherein the antibody is labeled with an enzyme, fluorescent, luminescent or radioactive material.
5. A method according to claim 3, further comprising performing a step selected from the group consisting of a counter immuno-electrophoresis, a radioimmunoassay, radioimmunoprecipitation assay, an enzyme-linked immunosorbent assay, a dot blot assay or an inhibition of competition assay and a sandwich assay using said antibody.
6. A method according to claim 2, wherein the fluid sample of (a) is obtained at greater than 9 weeks of pregnancy.
7. A method according to claim 6, wherein the subject does not have an increased risk of developing preeclampsia if the first level is the same as either the first control level or the earlier sample level.
8. A method according to claim 2, wherein the first time of pregnancy is 12 to 13 weeks of pregnancy.
9. A method according to claim 2, wherein the first time of pregnancy is 27 to 34 weeks of pregnancy.
10. A method according to claim 2, wherein said contacting comprises forming a complex in said first fluid sample comprising an antibody specific for HIF-1\u03b1 and HIF-1\u03b1 in the sample.
11. A method according to claim 10, wherein said contacting further comprises measuring a level of said complex in a suitable assay.
12. A method according to claim 2, where steps (a) and (b) are repeated during the subject’s pregnancy.
13. A method according to claim 2, further comprising:
c) contacting a fluid sample from the subject at a second time of pregnancy occurring later than step (a) with said diagnostic reagent and measuring a second level of HIF-1\u03b1; and
d) providing a diagnosis of increased risk of preeclampsia based upon an increase in the second level over
(i) the first control level;
(ii) the earlier sample level;
(iii) the first level of (a); or
(iv) a second control level of HIF-1\u03b1 obtained from samples of the same fluid taken at the same second time of pregnancy from women who did not develop preeclampsia.
14. A method according to claim 13, wherein the subject has an increased risk of developing preeclampsia if the second level is higher than any of levels (i) through (iv).
15. A method according to claim 2 wherein levels of HIF-1\u03b1 are measured by detecting a nucleic acid sequences encoding HIF-1\u03b1.
16. A method according to claim 15 wherein the nucleic acid sequence encoding HIF-1\u03b1 is detected using a nucleotide probe that hybridizes to the nucleic acid sequence or by selective amplification of the nucleic acid sequence using polymerase chain reaction.
17. A method for diagnosing or identifying an increased risk of preeclampsia in a subject, the method comprising:
a) detecting a level of HIF-1\u03b1 in a fluid sample from the subject in the first 16 weeks of pregnancy; and
b) comparing the level detected in the subject’s fluid sample to a control level obtained from samples of the same fluid taken at the same stage of pregnancy from women who did not develop preeclampsia;
wherein an increased level of HIF-1\u03b1 in the fluid sample from the subject indicates the increased risk of preeclampsia.
18. A method according to claim 17 wherein the levels of HIF-1\u03b1 are measured by detecting, directly or indirectly, the interaction of the HIF-1\u03b1 with an antibody specific for HIF-1\u03b1.
19. A method according to claim 18 wherein the antibody is labeled with an enzyme, fluorescent, luminescent or radioactive material.
20. A method according to claim 18 wherein the antibody is used in counter immuno-electrophoresis, a radioimmunoassay, radioimmunoprecipitation assay, an enzyme-linked immunosorbent assay, a dot blot assay or an inhibition of competition assay or a sandwich assay.
21. A method according to claim 17 wherein levels of HIF-1\u03b1 are measured by detecting a nucleic acid sequences encoding HIF-1\u03b1.
22. A method according to claim 21 wherein the nucleic acid sequence encoding HIF-1\u03b1 is detected using a nucleotide probe that hybridizes to the nucleic acid sequence or by selective amplification of the nucleic acid sequence using polymerase chain reaction.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A solid state drive, comprising:
an array of non-volatile memory cells having columns of memory cells coupled to bit lines and rows of memory cells coupled to word lines; and
control circuitry for controlling operation of the array of non-volatile memory cells wherein the control circuitry is adapted to program the memory cells in response to a determination of a controller performance level for data to be stored in the non-volatile memory array, determine a programming level that provides the controller performance level, and write the data to the non-volatile memory array at the programming level.
2. The solid state memory device of claim 1 wherein the control circuitry further comprises circuitry to read analog data signals from the memory cells being programmed and to generate digital threshold voltage signals indicative of the read analog data signals.
3. The solid state memory device of claim 1 wherein the control circuitry further comprises circuitry to receive a digital data signal indicative of a programmed memory state and to convert the digital data signal to an analog data signal indicative of a threshold voltage of the programmed memory state.
4. The solid state memory device of claim 1 wherein the array of non-volatile memory cells is organized in a NAND architecture.
5. The solid state memory device of claim 1 wherein the non-volatile memory cells are programmable to three or more levels.
6. The solid state memory device of claim 1 wherein the array of non-volatile memory cells is organized into blocks of non-volatile memory cells, each block of non-volatile memory cells being programmable in both single level cells and multiple level cells.
7. The solid state memory device of claim 6 wherein each block of non-volatile memory cells is programmable in both single level cells and multiple level cells in response to a programming speed generated for the control circuitry.
8. A solid state drive, comprising:
an array of memory cells; and
control circuitry for controlling operation of the array of memory cells wherein the control circuitry is configured to program at least one of the memory cells in response to a determination of a controller performance level for data to be stored in the memory array, determine a potential number of states that can be stored in the at least one of the memory cells that provides the determined controller performance level, and write the data to the memory array according to the potential number of states.
9. The solid state drive of claim 8 wherein the controller performance level comprises one of a required level of reliability or programming speed.
10. The solid state drive of claim 9 wherein the control circuitry is further configured to receive the required level of reliability.
11. The solid state drive of claim 10 wherein the required level of reliability comprises a lower error rate for program code than for image data.
12. The solid state drive of claim 9 wherein the control circuitry is further configured to adjust, responsive to the programming speed, a number of levels programmed per cell on a cell-by-cell, page-by-page, or block-by-block basis.
13. The solid state drive of claim 9 wherein the control circuitry is further configured to build a table in memory that lists a bit capacity level per cell with a corresponding programming speed.
14. The solid state drive of claim 13 wherein the control circuitry is further configured to build the table upon each power-up of the solid state drive.
15. The solid state drive of claim 13 wherein the control circuitry is further configured to store the table in non-volatile memory.
16. A solid state drive, comprising:
an array of memory cells; and
control circuitry for controlling operation of the array of memory cells wherein the control circuitry is configured to program a group of memory cells of the array in response to a determination of a controller performance level for data to be stored in the group of memory cells, determine a bit pattern that can be stored in each of the memory cells of the group of memory cells that provides the determined controller performance level, and write the data to the memory array according to the determined bit pattern.
17. The solid state drive of claim 16 wherein the control circuitry is further configured to determine reliability calibration for the array of memory cells.
18. The solid state drive of claim 17 wherein the control circuitry is further configured to the reliability calibration by controlling a write operation of a first voltage to a particular memory cell of the group of memory cells, write additional voltages to memory cells surrounding the particular memory cell, read the particular memory cell, vary the additional voltages of the memory cells surrounding the particular memory cell, and read a change in the first voltage responsive to the additional voltages.
19. The solid state drive of claim 18 wherein the control circuitry is further configured to generate the reliability calibration for different areas of the array of memory cells.
20. The solid state drive of claim 18 wherein the change in the first voltage is an offset voltage that is used by the control circuitry during subsequent write operations controlled by the control circuitry.