What is claimed is:
1. An electrolytic etching method comprising etching treating an object to be etched by an electrochemical reaction through an electrolyte between the object to be etched and an etching electrode, wherein the contact angle of the electrolyte to the object to be etched is not more than 70.
2. The electrolytic etching method according to claim 1, wherein the contact angle of the electrolyte to the object to be etched is not less than 10.
3. The electrolytic etching method according to claim 1, wherein the electrolyte contains an additive substance to lower the surface tension of the electrolyte.
4. The electrolytic etching method according to claim 3, wherein the content of the additive substance is 0.01-10% by weight.
5. The electrolytic etching method according to claim 3, wherein the additive substance is at least one selected from the group consisting of polyethylene glycol, polypropylene glycol, acetylenic alcohol, ethanol, and copolymers thereof, and surfactants.
6. The electrolytic etching method according to claim 1, wherein a patterning processing is carried out by the etching treatment.
7. The electrolytic etching method according to claim 6, wherein a mask is provided on the object to be etched and a portion of the object not covered by the mask is etched.
8. The electrolytic etching method according to claim 6, wherein the etching electrode is a patterned electrode.
9. The electrolytic etching method according to claim 1, wherein the electrolyte contains a Lewis acid or a Lewis base.
10. The electrolytic etching method according to claim 1, wherein the electrolyte is an aqueous solution.
11. The electrolytic etching method according to claim 1, wherein energization is achieved by allowing a direct current, a pulse current, or an alternating current to flow between the etching electrode and the object to be etched.
12. The electrolytic etching method according to claim 1, wherein after completion of the etching treatment, a water washing treatment and a thermal treatment of the object to be etched are carried out.
13. The electrolytic etching method according to claim 1, wherein the object to be etched is a substrate on which a transparent electroconductive film is deposited.
14. The electrolytic etching method according to claim 1, wherein the object to be etched is a substrate for a photovoltaic element having at least one of a metal layer and a transparent electroconductive film.
15. The electrolytic etching method according to any one of claims 1 to 12, wherein the object to be etched is a photovoltaic element comprising a semiconductor layer provided on a substrate and a transparent electrode layer provided on the semiconductor layer.
16. A method for producing a photovoltaic element comprising a semiconductor layer provided on a substrate and an electroconductive layer provided on the semiconductor layer, comprising the step of etching the electroconductive layer by the electrolytic etching method as set forth in any one of claims 1 to 12.
17. The method for producing a photovoltaic element according to claim 16, wherein the electroconductive layer is a transparent electrode layer.
18. A method for treating a defect of a photovoltaic element comprising a semiconductor layer provided on a substrate and an electroconductive layer provided on the semiconductor layer, and having a short-circuit path of electrically short-circuiting the electroconductive layer and the substrate through the semiconductor layer, the method comprising the step of reducing the electroconductive layer in the periphery of the short-circuit path by the electrolytic etching method as set forth in any one of claims 1 to 12.
19. The method for treating a defect of a photovoltaic element according to claim 18, wherein the electroconductive layer is a transparent electrode layer.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
We claim:
1. A method for fabricating an integrated circuit comprising the steps of:
providing a substrate;
forming on said substrate a thin film of metal oxide material having a protected segment and a sacrificial segment; and
forming a hydrogen barrier layer directly over said protected segment of said thin film of metal oxide material, wherein said hydrogen barrier layer is not directly over said sacrificial segment.
2. A method according to claim 1 further comprising the step of removing at least a portion of said sacrificial segment.
3. A method according to claim 1 wherein said hydrogen barrier layer comprises a nitride of titanium or silicon.
4. A method according to claim 1 wherein said metal oxide material comprises an oxide compound containing at least two metals.
5. A method according to claim 4 wherein at least one of said metals is present in said material in an excess amount.
6. A method according to claim 1 wherein said thin film of metal oxide material comprises a layered superlattice compound.
7. A method according to claim 6 wherein said layered superlattice compound comprises strontium bismuth tantalum niobate.
8. A method according to claim 7 wherein said layered superlattice compound contains an excess amount of at least one of the metals from the group comprising bismuth and niobium.
9. A method according to claim 1 further comprising the step of heating said integrated circuit portion in an atmosphere including hydrogen at a temperature not greater than 400 C., for a time period not greater than 30 minutes, wherein the mole fraction of hydrogen in said hydrogen atmosphere is from 0.01 to 50 percent.
10. A method for fabricating an integrated circuit comprising the steps of:
providing a substrate;
forming a bottom electrode on said substrate;
forming a thin film of metal oxide material above said bottom electrode, said thin film having a protected segment and a sacrificial segment;
forming a top electrode directly over at least a portion of said protected segment of said thin film of ferroelectric material;
forming a hydrogen barrier layer directly over at least a portion of said top electrode and directly over said protected segment of said thin film of metal oxide material, wherein said hydrogen barrier layer is not directly over said sacrificial segment.
11. An integrated circuit comprising:
a substrate;
a thin film of metal oxide material having a protected segment and a sacrificial segment formed on said substrate; and
a hydrogen barrier layer formed directly over said protected segment of said thin film of metal oxide material, wherein said hydrogen barrier layer is not directly over said sacrificial segment.
12. A ferroelectric integrated circuit according to claim 11 wherein said hydrogen barrier layer comprises a nitride of titanium or silicon.
13. A ferroelectric integrated circuit according to claim 11 wherein said oxide material comprises an oxide compound containing at least two metals.
14. An integrated circuit according to claim 13 wherein at least one of said metals is present in said material in an excess amount.
15. An integrated circuit according to claim 11 wherein said thin film of metal oxide material comprises a layered superlattice compound.
16. An integrated circuit according to claim 15 wherein said layered superlattice compound comprises strontium bismuth tantalum niobate.
17. An integrated circuit according to claim 17 wherein said layered superlattice compound contains an excess amount of at least one of the metals from the group comprising bismuth and niobium.
18. An integrated circuit comprising:
a substrate;
a bottom electrode formed on said substrate;
a thin film of metal oxide material formed above said bottom electrode, said thin film having a protected segment and a sacrificial segment;
a top electrode formed directly over at least a portion of said protected segment of said thin film of metal oxide material;
a hydrogen barrier layer formed directly over at least a portion of said top electrode and directly over said protected segment of said thin film of metal oxide material, wherein said hydrogen barrier layer is not directly over said sacrificial segment.
19. A method for fabricating an integrated circuit comprising the steps of:
providing a substrate;
forming a bottom electrode on said substrate;
forming a thin film of metal oxide material above said bottom electrode;
forming a top electrode layer directly over at least a portion of said metal oxide material;
forming a hydrogen barrier layer directly over at least a portion of said top electrode; and
patterning said top electrode layer and said hydrogen barrier layer in the same patterning process thereby forming a self-aligned top electrode and hydrogen barrier.
20. An integrated circuit comprising:
a substrate;
a bottom electrode formed on said substrate;
a thin film of metal oxide material formed above said bottom electrode;
a top electrode formed directly over at least a portion of said metal oxide material;
a hydrogen barrier formed directly over said top electrode, said top electrode and said hydrogen barrier being self-aligned.