1. A spray apparatus for the repair of coating adhered on a can end, comprising:
one or more elongated shafts rotatably coupled to a frame;
one or more bearing members rotatably coupled to the shafts;
one or more plates rotatably coupled to the bearing members; and
one or more spray guns coupled to the plates,
wherein the spray guns are structured to apply fluid to the can end with a solid stream emitted from the spray guns in a circular pattern.
2. The spray apparatus of claim 1, wherein a plurality of can ends, a plurality of elongated shafts, a plurality of bearing members, a plurality of plates and a plurality of spray guns are provided.
3. The spray apparatus of claim 2, further comprising:
a plurality of bearing members coupled to the frame,
wherein the elongated shafts pass through a portion of the bearing members coupled to the frame.
4. The spray apparatus of claim 2, wherein one of the shafts passes through an aperture of a first sprocket and the other one of the shafts passes through an aperture of a second sprocket.
5. The spray apparatus of claim 4, further comprising a belt rotatably coupled to the sprockets.
6. The spray apparatus of claim 5, further comprising a motor rotatably coupled to one of the shafts.
7. The spray apparatus of claim 1, further comprising a transfer mechanism located below the spray guns.
8. The spray apparatus of claim 2, wherein the plates have a plurality of brackets coupled to the plates with the spray guns coupled to the brackets.
9. A spray apparatus for the repair of coating adhered on a plurality of can ends, comprising:
a frame;
an elongated first shaft rotatably coupled to the frame;
an elongated second shaft rotatably coupled to the frame;
a third shaft coupled to the first shaft which passes through an aperture in a first bearing member and a first plate;
a fourth shaft coupled to the second shaft which passes through an aperture in a second bearing member and the first plate;
a fifth shaft coupled to the third shaft which passes through an aperture of a third bearing member and a second plate;
a sixth shaft coupled to the fourth shaft which passes through an aperture in a fourth bearing member and the second plate;
a first bracket coupled to the first plate;
a second bracket coupled to the second plate;
a first spray gun coupled to the first bracket; and
a second spray gun coupled to the second bracket,
wherein the spray guns are structured to apply fluid to the can ends with a solid stream emitted from the spray guns in a circular pattern.
10. The spray apparatus of claim 9, further comprising:
a plurality of bearing members coupled to the frame,
wherein the elongated first shaft passes through a portion of the bearing members coupled to the frame and the elongated second shaft passes through a portion of the bearing members coupled to the frame.
11. The spray apparatus of claim 9, wherein the elongated first shaft passes through an aperture of a first sprocket and the elongated second shaft passing through an aperture of a second sprocket.
12. The spray apparatus of claim 11, further comprising a belt rotatably coupled to the sprockets.
13. The spray apparatus of claim 12, further comprising a motor rotatably coupled to the first elongated shaft.
14. The spray apparatus of claim 9, further comprising a transfer mechanism located below the spray guns.
15. A method for the repair of coating adhered on a can end, comprising:
supplying fluid to a low pressure tank;
filtering the fluid through a fluid filter;
flowing the fluid through a fluid flow sensor; and
dispensing the fluid from a nozzle in a solid stream and in a circular pattern toward the can end,
wherein the low pressure tank, the fluid filter, the fluid flow sensor and the nozzle are in fluid communication with one another which defines a fluid delivery system.
16. The method of claim 15, wherein the fluid is dispensed through the nozzle at a relatively low pressure of less than 100 psi (0.690 MPa).
17. The method of claim 16, wherein the relatively low pressure is supplied from a compressed gas source.
18. The method of claim 15, wherein the fluid flow sensor selectively controls a flow rate of the fluid.
19. The method of claim 15, wherein the nozzle is rotated in a circular pattern which places the fluid in approximately a +\u22120.050 inch (1.27 mm) radial band around a centerline of the score line.
20. The method of claim 16, wherein the circular pattern of dispensing the fluid and low pressure substantially avoids dispensing fluid onto a transfer mechanism located below the nozzle which would contaminate the transfer mechanism.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A semiconductor device comprising:
an output terminal;
a plurality of series circuits for producing an output signal at the output terminal, each series circuit including a high-side field-effect transistor and a low-side field-effect transistor with respective first main terminals interconnected at a node connected to the output terminal, the high-side field-effect transistor having a second main terminal for receiving a power supply voltage, the low-side field-effect transistor having a second main terminal for receiving a ground voltage, the high-side and low-side field-effect transistors having respective control terminals by which they are turned on and off;
a driver circuit for outputting a first driving signal to turn the high-side field-effect transistors on and off and a second driving signal to turn the low-side field-effect transistors on and off;
a first salicided signal line for conducting the first driving signal successively to the control terminals of the high-side field-effect transistors, the first salicided signal line having a first salicide block area disposed between the control terminals of each mutually adjacent pair of high-side field-effect transistors; and
a second salicided signal line for conducting the second driving signal successively to the control terminals of the low-side field-effect transistors, the second salicided signal line having a second salicide block area disposed between each mutually adjacent pair of low-side field-effect transistors.
2. The semiconductor device of claim 1, wherein the control terminals of the high-side field-effect transistors extend as stubs from the first salicided signal line, and the control terminals of the low-side field-effect transistors extend as stubs from the second salicided signal line.
3. The semiconductor device of claim 1, wherein the control terminals of the high-side field-effect transistors are in series with each first salicide block area, and the control terminals of the low-side field-effect transistors are in series with each second salicide block area.
4. The semiconductor device of claim 1, further comprising:
a first switching element connected to the first salicided signal line in parallel with each first salicide block area;
a second switching element connected to the second salicided signal line in parallel with each second salicide block area; and
a switching control circuit for turning the first switching element off when the high-side field-effect transistors are turned on, turning the first switching element on when the high-side field-effect transistors are turned off, turning the second switching element off when the low-side field-effect transistors are turned on, and turning the second switching element on when the low-side field-effect transistors are turned off.
5. The semiconductor device of claim 4, wherein there are at least three series circuits, at least two first switching elements, and at least two second switching elements, a programmable number of the first switching elements being left turned on when the high-side field-effect transistors are turned on, another programmable number of the second switching elements being left turned on when the low-side field-effect transistors are turned on.
6. The semiconductor device of claim 1, wherein the high-side field-effect transistors are p-channel metal-oxide-semiconductor field-effect transistors (P-MOSFETs) and the low-side field-effect transistors are n-channel metal-oxide-semiconductor field-effect transistors (N-MOSFETs), further comprising, for each series circuit in the plurality of series circuits except a series circuit closest to the driver circuit:
a first switching element having one terminal for receiving the power supply voltage and another terminal connected to the control terminal of the high-side field-effect transistor in the series circuit; and
a second switching element having one terminal for receiving the ground voltage and another terminal connected to the control terminal of the low-side field-effect transistor in the series circuit;
the semiconductor device also comprising a switching control circuit for turning the first switching element off when the high-side field-effect transistors are turned on, turning the first switching element on when the high-side field-effect transistors are turned off, turning the second switching element off when the low-side field-effect transistors are turned on, and turning the second switching element on when the low-side field-effect transistors are turned off.
7. The semiconductor device of claim 1, wherein the high-side field-effect transistors and the low-side field-effect transistors are N-MOSFETs, further comprising, for each series circuit in the plurality of series circuits except a series circuit closest to the driver circuit:
a first switching element having one terminal connected to the output terminal and another terminal connected to the control terminal of the high-side field-effect transistor in the series circuit; and
a second switching element having one terminal for receiving the ground voltage and another terminal connected to the control terminal of the low-side field-effect transistor in the series circuit;
the semiconductor device also comprising a switching control circuit for turning the first switching element off when the high-side field-effect transistors are turned on, turning the first switching element on when the high-side field-effect transistors are turned off, turning the second switching element off when the low-side field-effect transistors are turned on, and turning the second switching element on when the low-side field-effect transistors are turned off.
8. A semiconductor device comprising:
an output terminal;
a series circuit for producing an output signal at the output terminal, the series circuit including a high-side field-effect transistor and a low-side field-effect transistor with respective first main terminals interconnected at a node connected to the output terminal, the high-side field-effect transistor having a second main terminal for receiving a power supply voltage, the low-side field-effect transistor having a second main terminal for receiving a ground voltage, the high-side and low-side field-effect transistors having respective control terminals by which they are turned on and off;
a first capacitor having a first terminal and a second terminal;
a second capacitor having a first terminal and a second terminal;
a first switching element connected to the first terminal of the first capacitor;
a second switching element connected to the first terminal of the second capacitor;
a switching control circuit for controlling the first and second switching elements;
a first driver for outputting a first driving signal to the control terminal of the high-side field-effect transistor and a first auxiliary signal to the first terminal of the first capacitor; and
a second driver for outputting a second driving signal to the control terminal of the low-side field-effect transistor and a second auxiliary signal to the first terminal of the second capacitor; wherein
when the high-side field-effect transistor is turned on, the first driver sets the first driving signal and the first auxiliary signal to mutually identical levels and the switching control circuit turns the first switching element off;
when the high-side field-effect transistor is turned off, the first driver places the first auxiliary signal in a high-impedance state and the switching control circuit turns the first switching element on;
when the low-side field-effect transistor is turned on, the second driver sets the second driving signal and the second auxiliary signal to mutually identical levels and the switching control circuit turns the second switching element off; and
when the high-side field-effect transistor is turned off, the second driver places the second auxiliary signal in the high-impedance state and the switching control circuit turns the second switching element on.
9. The semiconductor device of claim 8, wherein:
the low-side field-effect transistor is a first N-MOSFET;
the second switching element has a first terminal connected to the first terminal of the second capacitor and a second terminal for receiving the ground voltage; and
the second driver further comprises a first P-MOSFET, a second P-MOSFET, and a second N-MOSFET connected in series, the first P-MOSFET having a main terminal for receiving the power supply voltage, the second N-MOSFET having a main terminal for receiving the ground voltage, the second auxiliary signal being output from a node at which the first P-MOSFET and the second P-MOSFET are interconnected, the second driving signal being output from a node at which the second P-MOSFET and the second N-MOSFET are interconnected.
10. The semiconductor device of claim 9, wherein:
the high-side field-effect transistor is a third P-MOSFET;
the first switching element has a first terminal connected to the first terminal of the first capacitor and a second terminal for receiving the power supply voltage; and
the first driver further comprises a fourth P-MOSFET, a third N-MOSFET, and a fourth N-MOSFET connected in series, the fourth P-MOSFET having a main terminal for receiving the power supply voltage, the fourth N-MOSFET having a main terminal for receiving the ground voltage, the first driving signal being output from a node at which the fourth P-MOSFET and the third N-MOSFET are interconnected, the first auxiliary signal being output from a node at which the third N-MOSFET and the fourth N-MOSFET are interconnected.
11. The semiconductor device of claim 9, wherein:
the high-side field-effect transistor is a third N-MOSFET;
the first switching element has a first terminal connected to the first terminal of the first capacitor and a second terminal connected to the output terminal; and
the first driver further comprises a third P-MOSFET, a fourth P-MOSFET, and a fourth N-MOSFET connected in series, the third P-MOSFET having a main terminal for receiving the power supply voltage, the fourth N-MOSFET having a main terminal for receiving the ground voltage, the first auxiliary signal being output from a node at which the third P-MOSFET and the fourth P-MOSFET are interconnected, the first driving signal being output from a node at which the fourth P-MOSFET and the fourth N-MOSFET are interconnected.
12. A semiconductor device comprising:
an output terminal;
a plurality of series circuits for producing an output signal at the output terminal, each series circuit including a high-side field-effect transistor and a low-side field-effect transistor with respective first main terminals interconnected at a node connected to the output terminal, the high-side field-effect transistor having a second main terminal for receiving a power supply voltage, the low-side field-effect transistor having a second main terminal for receiving a ground voltage, the high-side and low-side field-effect transistors having respective control terminals by which they are turned on and off;
a driver circuit for outputting a plurality of first driving signals to the control terminals of the high-side field-effect transistors and a plurality of second driving signals to the control terminals of the low-side field-effect transistors; wherein
the first driving signals turn the high-side field-effect transistors on at mutually differing timings; and
the second driving signals turn the low-side field-effect transistors on at mutually differing timings.
13. The semiconductor device of claim 12, wherein the high-side field-effect transistors have mutually differing threshold voltages, the low-side field-effect transistors have mutually differing threshold voltages, and the driver circuit further comprises:
a plurality of first drivers with mutually identical driving abilities for generating the first driving signals; and
a plurality of second drivers with mutually identical driving abilities for generating the second driving signals.
14. The semiconductor device of claim 12, wherein the high-side field-effect transistors have mutually identical threshold voltages, the low-side field-effect transistors have mutually identical threshold voltages, and the driver circuit further comprises:
a plurality of first drivers with mutually differing driving abilities for generating the first driving signals; and
a plurality of second drivers with mutually differing driving abilities for generating the second driving signals.
15. The semiconductor device of claim 12, wherein the high-side field-effect transistors are P-MOSFETs and the low-side field-effect transistors are N-MOSFETs, further comprising:
a plurality of first switching elements each having one terminal for receiving the power supply voltage and another terminal connected to the control terminal the high-side field-effect transistor in one of the series circuits;
a plurality of second switching element each having one terminal for receiving the ground voltage and another terminal connected to the control terminal of the low-side field-effect transistor in one of the series circuits; and
a switching control circuit for turning the first switching elements off when the high-side field-effect transistors are turned on, turning the first switching elements on when the high-side field-effect transistors are turned off, turning the second switching elements off when the low-side field-effect transistors are turned on, and turning the second switching elements on when the low-side field-effect transistors are turned off.
16. The semiconductor device of claim 12, wherein the high-side field-effect transistors and the low-side field-effect transistors are N-MOSFETs, further comprising:
a plurality of first switching elements each having one terminal connected to the output terminal and another terminal connected to the control terminal of the high-side field-effect transistor in one of the series circuits;
a plurality of second switching element each having one terminal for receiving the ground voltage and another terminal connected to the control terminal of the low-side field-effect transistor in one of the series circuits; and
a switching control circuit for turning the first switching elements off when the high-side field-effect transistors are turned on, turning the first switching elements on when the high-side field-effect transistors are turned off, turning the second switching elements off when the low-side field-effect transistors are turned on, and turning the second switching elements on when the low-side field-effect transistors are turned off.