1. A security system using a power line communication technology utilizing a power line to provide data communication, comprising:
a pressure sensor portion sensing a pressure applied to a surface thereof;
a storage portion storing at least one initial value of a pressure value output from said pressure sensor portion. wherein each initial value corresponds to a weight on the pressure sensor portion, and is associated with a registration number;
a control portion outputting a data signal indicating that an abnormal event is sensed when the pressure value output from said pressure sensor portion does not fall within a prescribed range centered on one of the at least one initial value stored in said storage portion; and
a modem portion superimposing said data signal on a power carrier wave on said power line, and notifying a prescribed destination that the abnormal event is sensed.
2. The security system according to claim 1,
wherein said storage portion is further adapted to store at least one moving route, and
wherein said control portion is further adapted to compare said moving route stored in said storage portion With a moving route associated with a pressure value output from said pressure sensor portion, and outputs a data signal indicating that an abnormal event is sensed when the pressure value output from said pressure sensor portion does not fall within a prescribed range centered on one of the at least one initial value stored in said storage portion and the moving route associated with the pressure value output from said pressure sensor portion is different from the moving route stored in said storage portion.
3. The security system according to claim 2, wherein said pressure sensor portion includes a plurality of pressure sensors arranged in a plurality of rows and a plurality of columns.
4. A monitoring method using a power line communication technology utilizing a power line to provide data communication, comprising the steps of:
storing at least one initial value of a pressure value output from a pressure sensor portion sensing a pressure applied to a surface thereof, wherein each initial value corresponds to a weight on the pressure sensor portion. and is associated with a registration number;
comparing each of said at least one initial value with a pressure value output from said pressure sensor portion, and when the pressure value output from said pressure sensor portion does not fall within a prescribed range centered on one of the at least one initial value stored in said storage portion, generating a data signal indicating that an abnormal event is sensed; and
superimposing said data signal on a power cater wave on said power line and notifying a prescribed destination that the abnormal event is sensed.
5. The monitoring method according to claim 4, further comprising the steps of:
storing at least one moving route;
comparing the stored moving route with the moving route associated with a pressure value output from said pressure sensor portion; and
generating a data signal indicating that an abnormal event is sensed when the pressure value output from said pressure sensor portion does not fall within a prescribed range centered on one of the at least one initial value stored in said storage portion and the moving route associated with the pressure value output from said pressure sensor portion is different from the moving route stored in said storage portion.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method comprising:
forming an interconnect layer on a first substrate;
attaching an active side of a semiconductor die to the interconnect layer using a first bump;
attaching a package interconnect structure to the interconnect layer; and
attaching the package interconnect structure to a second substrate such that
(i) the interconnect layer is attached to the second substrate via the package interconnect structure, and
(ii) the semiconductor die is disposed between the first substrate and the second substrate, wherein the active side of the semiconductor die faces the first substrate and an inactive side of the semiconductor die faces the second substrate, and wherein the package interconnect structure is a structure configured to interconnect the interconnect layer and the second substrate.
2. The method of claim 1, further comprising:
prior to attaching the package interconnect structure to the interconnect layer,
(i) forming a second bump on the interconnect layer,
(ii) depositing a molding compound on the interconnect layer such that the molding compound is deposited on the second bump, and
(iii) forming an opening in the molding compound over the second bump such that the second bump is exposed through the opening,
wherein attaching the package interconnect structure to the interconnect layer comprises
forming the package interconnect structure through the opening in the molding compound such that the package interconnect structure is attached to the interconnect layer via the second bump.
3. The method of claim 1, further comprising:
forming a heat dissipation structure on an inactive side of the semiconductor die.
4. The method of claim 3, wherein:
the package interconnect structure has (i) a first end that is attached to the interconnect layer and (ii) a second end that is opposite to the first end;
the heat dissipation structure has (i) a first end that is attached to the inactive side of the semiconductor die and (ii) a second end that is opposite to the first end; and
prior to attaching the package interconnect structure to the second substrate, the second end of the package interconnect structure and the second end of the heat dissipation structure substantially lie in the same plane.
5. The method of claim 3, further comprising:
attaching the heat dissipation structure to the second substrate.
6. The method of claim 3, further comprising:
prior to forming the heat dissipation structure on the inactive side of the semiconductor die,
(i) depositing a molding compound such that the molding compound encapsulates at least the inactive side of the semiconductor die, and
(ii) forming an opening in the molding compound such that a first section of the inactive side of the semiconductor die is exposed through the opening,
wherein forming the heat dissipation structure on the inactive side of the semiconductor die comprises
forming the heat dissipation structure through the opening in the molding compound such that the heat dissipation structure is attached to the first section of the inactive side of the semiconductor die.
7. The method of claim 1, wherein the package interconnect structure is larger in size than the first bump.
8. The method of claim 1, wherein forming the interconnect layer on the first substrate comprises:
forming a dielectric layer on the first substrate; and
forming the interconnect layer on the dielectric layer.
9. The method of claim 1, wherein the second substrate is a printed circuit board.
10. The method of claim 1, wherein the semiconductor die is a first semiconductor die, the method further comprising:
attaching a second semiconductor die to the interconnect layer using a second bump.
11. An apparatus comprising:
a first substrate;
an interconnect layer formed on the first substrate;
a semiconductor die, wherein an active side of the semiconductor die is attached to the interconnect layer;
a package interconnect structure attached to the interconnect layer; and
a second substrate, wherein the package interconnect structure is configured to be attached to the second substrate such that (i) the interconnect layer is attached to the second substrate via the package interconnect structure and (ii) the semiconductor die is disposed between the first substrate and the second substrate.
12. The apparatus of claim 11, further comprising:
a molding compound deposited on the interconnect layer,
wherein the package interconnect structure is formed through an opening in the molding compound.
13. The apparatus of claim 11, further comprising:
a heat dissipation structure formed on an inactive side of the semiconductor die.
14. The apparatus of claim 13, wherein:
the package interconnect structure has (i) a first end that is attached to the interconnect layer and (ii) a second end that is opposite to the first end;
the heat dissipation structure has (i) a first end that is attached to the inactive side of the semiconductor die and (ii) a second end that is opposite to the first end; and
prior to the package interconnect structure being attached to the second substrate, the second end of the package interconnect structure and the second end of the heat dissipation structure substantially lie in the same plane.
15. The apparatus of claim 13, wherein the heat dissipation structure is attached to the second substrate.
16. The apparatus of claim 13, further comprising:
a molding compound deposited to encapsulate at least the inactive side of the semiconductor die,
wherein the heat dissipation structure is formed through an opening in the molding compound.
17. The apparatus of claim 11, wherein:
the active side of the semiconductor die is attached to the interconnect layer via a bump; and
the package interconnect structure is larger in size than the bump.
18. The apparatus of claim 11, further comprising:
a dielectric layer formed directly on the first substrate,
wherein the interconnect layer is formed on the dielectric layer.
19. The apparatus of claim 11, wherein the second substrate is a printed circuit board.
20. The apparatus of claim 11, wherein the active side of the semiconductor die is attached to the interconnect layer via a first bump, wherein the semiconductor die is a first semiconductor die, the apparatus further comprising:
a second semiconductor die attached to the interconnect layer using a second bump.