1460725582-d38db285-261d-4b00-bb10-864882228b3c

1. A method for reducing X-pessimism, the method comprising:
identifying a set of reconvergent inputs of a combinational block in a gate-level design; and
in response to determining that the combinational block is expected to exhibit X-pessimism during gate-level simulation, adding, by computer, a correcting block to the gate-level design, wherein an output of the combinational block or the correcting block is selected based on the values of the set of reconvergent inputs.
2. The method of claim 1, wherein identifying the set of reconvergent inputs includes identifying at least two distinct paths between a first input and a first output of the combinational block.
3. The method of claim 1, wherein determining that the combinational block is expected to exhibit X-pessimism during gate-level simulation includes simulating the combinational block with indeterminate values.
4. The method of claim 1, wherein determining that the combinational block is expected to exhibit X-pessimism during gate-level simulation includes receiving user input which identifies one or more combinational blocks that are expected to exhibit X-pessimism during gate-level simulation.
5. The method of claim 1, wherein adding the correcting block to the gate-level design includes adding the correcting block during compilation of the gate-level design to obtain a corrected object code.
6. The method of claim 5, wherein the method further comprises simulating the gate-level design by executing the corrected object code.
7. The method of claim 1, wherein adding the correcting block to the gate-level design includes:
adding the correcting block during pre-compilation of the gate-level design to obtain a corrected gate-level design; and
compiling the corrected gate-level design to obtain a corrected object code.
8. The method of claim 7, wherein the method further comprises simulating the gate-level design by executing the corrected object code.
9. A non-transitory computer-readable storage medium storing instructions that, when executed by a computer, cause the computer to perform a method for reducing X-pessimism, the method comprising:
identifying a set of reconvergent inputs of a combinational block in a gate-level design; and
in response to determining that the combinational block is expected to exhibit X-pessimism during gate-level simulation, adding a correcting block to the gate-level design, wherein an output of the combinational block or the correcting block is selected based on the values of the set of reconvergent inputs.
10. The non-transitory computer-readable storage medium of claim 9, wherein determining that the combinational block is expected to exhibit X-pessimism during gate-level simulation includes simulating the combinational block with indeterminate values.
11. The non-transitory computer-readable storage medium of claim 9, wherein determining that the combinational block is expected to exhibit X-pessimism during gate-level simulation includes receiving user input which identifies one or more combinational blocks that are expected to exhibit X-pessimism during gate-level simulation.
12. The non-transitory computer-readable storage medium of claim 9, wherein determining that the combinational block is expected to exhibit X-pessimism during gate-level simulation includes:
representing the combinational block using a Boolean expression; and
analyzing the Boolean expression to determine whether or not the combinational block is expected to exhibit X-pessimism during gate-level simulation.
13. The non-transitory computer-readable storage medium of claim 9, wherein adding the correcting block to the gate-level design includes adding the correcting block during compilation of the gate-level design to obtain a corrected object code.
14. The non-transitory computer-readable storage medium of claim 13, wherein the method further comprises simulating the gate-level design by executing the corrected object code.
15. The non-transitory computer-readable storage medium of claim 9, wherein adding the correcting block to the gate-level design includes:
adding the correcting block during pre-compilation of the gate-level design to obtain a corrected gate-level design; and
compiling the corrected gate-level design to obtain a corrected object code.
16. The non-transitory computer-readable storage medium of claim 15, wherein the method further comprises simulating the gate-level design by executing the corrected object code.
17. A system, comprising:
a processor; and
a non-transitory computer-readable storage medium storing instructions that, when executed by the processor, cause the system to perform a method for reducing X-pessimism, the method comprising:
identifying a set of reconvergent inputs of a combinational block in a gate-level design; and
in response to determining that the combinational block is expected to exhibit X-pessimism during gate-level simulation, adding a correcting block to the gate-level design, wherein an output of the combinational block or the correcting block is selected based on the values of the set of reconvergent inputs.
18. The system of claim 17, wherein determining that the combinational block is expected to exhibit X-pessimism during gate-level simulation includes simulating the combinational block with indeterminate values.
19. The system of claim 17, wherein determining that the combinational block is expected to exhibit X-pessimism during gate-level simulation includes receiving user input which identifies one or more combinational blocks that are expected to exhibit X-pessimism during gate-level simulation.
20. The system of claim 17, wherein determining that the combinational block is expected to exhibit X-pessimism during gate-level simulation includes:
representing the combinational block using a Boolean expression; and
analyzing the Boolean expression to determine whether or not the combinational block is expected to exhibit X-pessimism during gate-level simulation.
21. A method for reducing X-pessimism, the method comprising:
identifying a set of reconvergent inputs of a combinational block in a gate-level design; and
in response to determining that the combinational block is expected to exhibit X-pessimism during gate-level simulation, modifying, by computer, the gate-level design, wherein said modifying includes:
adding one or more replicas of the combinational block,
adding one or more X-splitter blocks to couple each reconvergent input that is capable of having an indeterminate value to corresponding inputs of the one or more replicas, and
adding one or more X-merger blocks to merge corresponding outputs from the replicas.
22. A method for reducing X-pessimism, the method comprising:
generating, by computer, a model of a gate-level design, wherein said generating includes representing a source of an indeterminate value in the gate-level design with a unique free input variable, wherein the source of the indeterminate value is not a primary input of the gate-level design; and
performing formal verification of the gate-level design using the model, wherein said performing includes determining logical equivalence between the gate-level design and a corresponding register-transfer level design.
23. The method of claim 21, wherein determining that the combinational block is expected to exhibit X-pessimism during gate-level simulation includes simulating the combinational block with indeterminate values.
24. The method of claim 21, wherein determining that the combinational block is expected to exhibit X-pessimism during gate-level simulation includes receiving user input which identifies one or more combinational blocks that are expected to exhibit X-pessimism during gate-level simulation.
25. The method of claim 21, wherein determining that the combinational block is expected to exhibit X-pessimism during gate-level simulation includes:
representing the combinational block using a Boolean expression; and
analyzing the Boolean expression to determine whether or not the combinational block is expected to exhibit X-pessimism during gate-level simulation.
26. A non-transitory computer-readable storage medium storing instructions that, when executed by a computer, cause the computer to perform a method for reducing X-pessimism, the method comprising:
identifying a set of reconvergent inputs of a combinational block in a gate-level design; and
in response to determining that the combinational block is expected to exhibit X-pessimism during gate-level simulation, modifying the gate-level design, wherein said modifying includes:
adding one or more replicas of the combinational block,
adding one or more X-splitter blocks to couple each reconvergent input that is capable of having an indeterminate value to corresponding inputs of the one or more replicas, and
adding one or more X-merger blocks to merge corresponding outputs from the replicas.
27. The non-transitory computer-readable storage medium of claim 26, wherein determining that the combinational block is expected to exhibit X-pessimism during gate-level simulation includes simulating the combinational block with indeterminate values.
28. The non-transitory computer-readable storage medium of claim 26, wherein determining that the combinational block is expected to exhibit X-pessimism during gate-level simulation includes receiving user input which identifies one or more combinational blocks that are expected to exhibit X-pessimism during gate-level simulation.
29. The non-transitory computer-readable storage medium of claim 26, wherein determining that the combinational block is expected to exhibit X-pessimism during gate-level simulation includes:
representing the combinational block using a Boolean expression; and
analyzing the Boolean expression to determine whether or not the combinational block is expected to exhibit X-pessimism during gate-level simulation.
30. A non-transitory computer-readable storage medium storing instructions that, when executed by a computer, cause the computer to perform a method for reducing X-pessimism, the method comprising:
generating, by computer, a model of a gate-level design, wherein said generating includes representing a source of an indeterminate value in the gate-level design with a unique free input variable, wherein the source of the indeterminate value is not a primary input of the gate-level design; and
performing formal verification of the gate-level design using the model, wherein said performing includes determining logical equivalence between the gate-level design and a corresponding register-transfer level design.
31. A method for reducing X-pessimism, the method comprising:
generating, by computer, a model of a gate-level design, wherein said generating includes representing a source of an indeterminate value in the gate-level design with a unique free input variable, wherein the source of the indeterminate value is not a primary input of the gate-level design; and
performing formal verification of the gate-level design using the model, wherein said performing includes determining logical equivalence between the gate-level design and another gate-level design.
32. A non-transitory computer-readable storage medium storing instructions that, when executed by a computer, cause the computer to perform a method for reducing X-pessimism, the method comprising:
generating, by computer, a model of a gate-level design, wherein said generating includes representing a source of an indeterminate value in the gate-level design with a unique free input variable, wherein the source of the indeterminate value is not a primary input of the gate-level design; and
performing formal verification of the gate-level design using the model, wherein said performing includes determining logical equivalence between the gate-level design and another gate-level design.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A device comprising:
a first material configured to reflect less than 40% of incident infrared light at a designated wavelength;
a second material configured to reflect more than 70% of incident infrared light at the designated wavelength; and
an input surface having a pattern with a total pattern area, the pattern comprising:
the first material configured in a first plurality of features having a first area of more than 51% of the total pattern area;
the second material configured in a second plurality of features having a second area of less than 49% of the total pattern area; and
wherein the first plurality of features and the second plurality of features are interspersed with one another and the pattern reduces multi-path interference by absorbing incident infrared light at the designated wavelength.
2. The device of claim 1, further comprising:
a third material configured to reflect more than 70% of incident visible light having a wavelength different than the designated wavelength, wherein the third material is transmissive to at least 70% of the incident infrared light and is placed atop one or more of the first material or the second material, and wherein the third material is configured to act as a projection surface for enabling visible light images to be projected thereon.
3. The device of claim 1, wherein:
the first material is further configured to reflect more than 70% of incident visible light,
the second material is further configured to reflect more than 70% of incident visible light, and
wherein one or more of the first material or the second material is configured to act as a projection surface for enabling visible light images to be projected thereon.
4. The device of claim 1, wherein at least a portion of the first plurality of features comprises one or more fiducials disposed at one or more locations within the pattern, at least a portion of the one or more fiducials being configured to reflect more than 70% of incident infrared light at the designated wavelength for determining one or more of a distance or a pose of the input surface.
5. The device of claim 1, wherein the pattern comprises a grid of grid blocks and grid lines, and further wherein the grid blocks comprise the first material and are configured to absorb incident infrared light reflected from an object, and the grid lines comprise the second material and are configured to reflect incident infrared light for determining one or more of a distance or a pose of the input surface.
6. The device of claim 2, wherein the incident infrared light has a wavelength ranging from 700 nanometers to 1200 nanometers, and the incident visible light has a wavelength ranging from 700 nanometers to 360 nanometers.
7. A method comprising:
generating a pattern having a total pattern area, the pattern comprising optically absorptive features and optically reflective features, wherein a total area of the optically reflective features is less than 10% of the total pattern area; and
placing the pattern on a substrate, wherein the optically absorptive features comprise low infrared albedo material and the optically reflective features comprise high infrared albedo materials and the pattern reduces multi-path interference from infrared light by absorbing at least a portion of the infrared light.
8. The method of claim 7, wherein the pattern comprises the optically absorptive features arranged as grid blocks configured to absorb infrared light and the optically reflective features arranged as grid lines configured to reflect infrared light for determining one or more of a distance or a pose of the pattern.
9. The method of claim 7, the generating the pattern comprising using a pseudorandom function to place one or more of the optically reflective features or the optically absorptive features.
10. The method of claim 7, further comprising:
placing a layer atop the optically absorptive features and the optically reflective features, wherein the layer is reflective to visible light and transmissive to infrared light, the layer being configured to act as a projection surface for images.
11. The method of claim 7, the generating the pattern comprising:
accessing data indicative of arrangement of one or more user interface input elements in the total pattern area; and
arranging one or more of the optically absorptive features or the optically reflective features in the pattern, wherein the optically absorptive features are proximate to the one or more user interface input elements for absorbing infrared light reflected from an object proximate to the one or more user interface elements, and the optically reflective features are distal to the one or more user interface input elements.
12. The method of claim 7, the generating the pattern comprising:
arranging the optically absorptive features to form one or more user interface input element exclusion zones in the pattern, wherein the one or more user interface input element exclusion zones are free from the optically reflective features to reduce multi-path interference from reflected infrared light in the one or more user interface input element exclusion zones.
13. The method of claim 7, the placing comprising one or more of: printing, vapor deposition, lithography, inkjet deposition, embossing, laminating, adhering, or ablating.
14. A system comprising:
an input surface configured to interact with emitted light, the input surface comprising:
a pattern having a total pattern area comprising areas of a first material and a second material, wherein:
the first material is configured to reflect less than 30% of incident infrared light;
the second material is configured to reflect more than 80% of incident infrared light; and
the total pattern area comprises 90% or more by area of the first material and the pattern reduces multi-path interference from emitted light by absorbing at least a portion of the emitted light.
15. The system of claim 14, further comprising:
an infrared time-of-flight assembly configured to generate time-of-flight data, the infared time-of-flight assembly comprising:
an emitter configured to produce infrared emitted light, wherein a first portion of the infrared emitted light is absorbed by the first material and a second portion of the infrared emitted light is reflected by the second material; and
an image sensor configured to detect the second portion of the infrared emitted light.
16. The system of claim 15, further comprising:
a computing device coupled to the infrared time-of-flight assembly, the computing device comprising:
at least one memory storing computer-executable instructions; and
at least one processor configured to access the infrared time-of-flight assembly and the at least one memory, the at least one processor configured to execute the computer-executable instructions to cause the at least one processor to:
receive the time-of-flight data from the infrared time-of-flight assembly;
determine time-of-flight data associated with the second portion of the infrared emitted light reflected by the second material; and
generate a depth map based on the determined time-of-flight data.
17. The system of claim 16, wherein the pattern comprises one or more fiducials arranged at one or more corners of the input surface, the fiducials comprising the second material, the computer-executable instructions further being configured to cause the at least one processor to:
identify at least one of the one or more fiducials in the time-of-flight data; and
determine, based at least in part on the identified at least one of the one or more fiducials, a pose of the input surface in space relative to the infrared time-of-flight assembly.
18. The system of claim 17, further comprising a visible light image projector configured to project an image of a user interface onto the input surface, the input surface being configured to reflect at least 70% of incident visible light, the computer-executable instructions further being configured to modify the image based at least in part on the pose of the input surface.
19. The system of claim 18, the computer-executable instructions further being configured to cause the at least one processor to:
determine user input responsive to the user interface based on the depth map.
20. The system of claim 14, wherein the input surface is configured to be mounted to one or more of a wall, a table, or a floor.