What is claimed is:
1. A method of fabricating a feature on a substrate comprising:
forming a feature layer on said substrate;
forming a first edge definition layer comprising a first material on said feature layer;
forming a patterned second edge definition layer comprising a second material on said first edge definition layer;
forming a spacer adjacent to an edge of said patterned second edge definition layer, said spacer covering a first area of said feature layer;
etching a second area of said feature layer to form said feature under said spacer.
2. The method of claim 1 wherein said first material comprises silicon nitride.
3. The method of claim 1 wherein said second material comprises silicon dioxide.
4. The method of claim 1 wherein said spacer comprises the first material.
5. The method of claim 1 wherein said spacer comprises silicon nitride.
6. The method of claim 1 wherein said feature layer is conductive.
7. The method of claim 1 wherein said feature layer comprises polysilicon.
8. The method of claim 1 wherein said feature is a transistor gate electrode.
9. A method of fabricating a feature on a substrate comprising:
forming a feature layer on said substrate;
forming a first edge definition layer comprising a first material on said feature layer;
forming a patterned second edge definition layer comprising a second material on said first edge definition layer;
forming a spacer layer on said patterned second edge definition layer;
etching said spacer layer to form a spacer adjacent to an edge of said patterned second edge definition layer, said spacer covering a first area of said feature layer;
etching said patterned second edge definition layer to substantially uncover an area of said first edge definition layer;
etching said area of said first edge definition layer to substantially uncover a second area of said feature layer; and
etching said second area of said feature layer to form said feature under said spacer.
10. The method of claim 9 wherein said conductive feature is a transistor gate electrode.
11. A method of fabricating a feature on a substrate comprising:
forming a feature layer comprising polysilicon on said substrate;
forming a first edge definition layer comprising silicon nitride on said feature layer;
forming a second edge definition layer comprising silicon dioxide on said first edge definition layer;
forming an edge definition mask over a first area of said second edge definition layer;
etching a second area of said second edge definition layer to form a patterned second edge definition layer;
removing said edge definition mask;
forming a spacer layer comprising silicon nitride on said patterned second edge definition layer;
anisotropically etching said spacer layer to form a spacer adjacent to an edge of said patterned second edge definition layer, said spacer covering a first area of said feature layer;
forming a trim mask over said spacer;
isotropically etching said patterned second edge definition layer to substantially uncover an area of said first edge definition layer;
removing said trim mask;
anisotropically etching said area of said first edge definition layer to substantially uncover a second area of said feature layer; and
anisotropically etching said second area of said feature layer to form said feature under said spacer.
12. The method of claim 11 wherein said feature is a transistor gate electrode.
13. The method of claim 11 wherein said edge definition mask is also formed over a third area of said second edge definition layer.
14. The method of claim 11 wherein said trim mask is also formed over a third area of said feature layer.
15. A method of fabricating a feature on a substrate comprising:
forming a feature layer on said substrate;
forming a first edge definition layer comprising a first material on said feature layer;
forming a patterned second edge definition layer comprising a second material on said first edge definition layer;
forming a spacer layer on said patterned second edge definition layer;
forming a mask over a first area of said spacer layer, said first area of said spacer layer covering an area of said patterned second edge definition layer, said area of said patterned second edge definition layer comprising an edge of said patterned second edge definition layer;
etching a second area of said spacer layer;
etching said area of said patterned second edge definition layer;
removing said mask;
etching said first edge definition layer to form a spacer over a first area of said feature layer; and
etching a second area of said feature layer to form said feature under said spacer.
16. The method of claim 15 wherein said first material comprises silicon nitride.
17. The method of claim 15 wherein said second material comprises silicon dioxide.
18. The method of claim 15 wherein said spacer layer comprises the first material.
19. The method of claim 15 wherein said spacer layer comprises silicon nitride.
20. The method of claim 15 wherein said feature layer is conductive.
21. The method of claim 15 wherein said feature layer comprises polysilicon.
22. The method of claim 15 wherein said feature is a transistor gate electrode.
23. The method of claim 15 wherein said mask is also formed over a third area of said spacer layer.
24. A method of fabricating a feature on a substrate comprising:
forming a feature layer comprising polysilicon on said substrate;
forming a first edge definition layer comprising silicon nitride on said feature layer;
forming a second edge definition layer comprising silicon dioxide on said first edge definition layer;
forming an edge definition mask over a first area of said second edge definition layer;
etching a second area of said second edge definition layer to form a patterned second edge definition layer;
removing said edge definition mask;
forming a spacer layer comprising silicon nitride on said patterned second edge definition layer;
forming a trim mask over a first area of said spacer layer, said first area of said spacer layer covering an area of said patterned second edge definition layer, said
area of said patterned second edge definition layer comprising an edge of said patterned second edge definition layer;
anisotropically etching a second area of said spacer layer;
isotropically etching said patterned second edge definition layer;
removing said trim mask;
anisotropically etching said first edge definition layer to form a spacer over a first area of said feature layer; and
anisotropically etching a second area of said feature layer to form said feature under said spacer.
25. The method of claim 24 wherein said feature is a transistor gate electrode.
26. The method of claim 24 wherein said edge definition mask is also formed over a third area of said second edge definition layer.
27. The method of claim 24 wherein said trim mask is also formed over a third area of said spacer layer.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method for using complexity probability to plan a datacenter relocation project, the method comprising:
one or more processors of a computer system receiving a description of a set of entities to be relocated by the datacenter relocation project;
the one or more processors associating each entity of the set of entities with a category of a set of categories and a tier of a set of tiers;
the one or more processors further receiving historical data that identifies a previous duration of time required to perform previous relocation projects;
the one or more processors identifying an initial set of durations as a function of the historical data, wherein each initial duration of the initial set of durations estimates how long it will take to relocate all entities of the set of entities that are associated with a unique combination of a category of the set of categories and a tier of the set of tiers;
the one or more processors generating a multitude of random numbers;
the one or more processors estimating a set of complexity-compensated relocation durations, wherein a first complexity duration of the set of complexity-compensated relocation durations is estimated as a function of a first duration of the initial set of durations and a first random number of the multitude of random numbers, and identifies a distinct amount of time required to relocate all entities of the set of entities that are associated with a one category of the set of categories.
2. The method of claim 1, further comprising:
the one or more processors identifying a probability that a relocation of a subset of entities of the set of entities that is associated with the one category will require a probable duration of time, wherein the identifying is performed as a function of the set of complexity-compensated relocation durations.
3. The method of claim 1, wherein a tier of the set of tiers identifies a degree of complexity of the entity.
4. The method of claim 1, wherein a tier of the set of tiers identifies a degree of complexity of a task of relocating the entity.
5. The method of claim 1, wherein the category is selected from a group comprising: a critical entity, a noncritical entity, a virtualized image, a physical entity, and an application-on-demand software application.
6. The method of claim 1, wherein the random numbers are normalized prior to the estimating to a value no less than 0 and no greater than 1.
7. The method of claim 1, wherein the identifying further comprises generating a histogram that represents a probability that a particular duration of time will be necessary to relocate all entities of the set of entities that are associated with a particular category of the set of categories.
8. The method of claim 1, wherein the estimating the first complexity duration is performed as a further function of a sum of a set of compensated categorytier durations, and wherein each categorytier duration of the set of compensated categorytier durations identifies an estimated duration of time required to move all entities associated with the one category and with a selected tier of the set of tiers, and wherein the further function comprises weighting each categorytier duration of the set of compensated categorytier durations by an associated random number of the multitude of random numbers.
9. The method of claim 1, further comprising providing at least one support service for at least one of creating, integrating, hosting, maintaining, and deploying computer-readable program code in the computer system, wherein the computer-readable program code in combination with the computer system is configured to implement the receiving, associating, further receiving, identifying, generating, and estimating.
10. A computer program product, comprising a computer-readable hardware storage device having a computer-readable program code stored therein, said program code configured to be executed by one or more processors of a computer system to implement a method for using complexity probability to plan a datacenter relocation project, the method comprising:
the one or more processors receiving a description of a set of entities to be relocated by the datacenter relocation project;
the one or more processors associating each entity of the set of entities with a category of a set of categories and a tier of a set of tiers;
the one or more processors further receiving historical data that identifies a previous duration of time required to perform previous relocation projects;
the one or more processors identifying an initial set of durations as a function of the historical data, wherein each initial duration of the initial set of durations estimates how long it will take to relocate all entities of the set of entities that are associated with a unique combination of a category of the set of categories and a tier of the set of tiers;
the one or more processors generating a multitude of random numbers;
the one or more processors estimating a set of complexity-compensated relocation durations, wherein a first complexity duration of the set of complexity-compensated relocation durations is estimated as a function of a first duration of the initial set of durations and a first random number of the multitude of random numbers, and identifies a distinct amount of time required to relocate all entities of the set of entities that are associated with a one category of the set of categories.
11. The computer program product of claim 11, further comprising:
the one or more processors identifying a probability that a relocation of a subset of entities of the set of entities that is associated with the one category will require a probable duration of time, wherein the identifying is performed as a function of the set of complexity-compensated relocation durations.
12. The computer program product of claim 11, wherein a tier of the set of tiers identifies a degree of complexity of the entity.
13. The computer program product of claim 11, wherein the random numbers are normalized prior to the estimating to a value no less than 0 and no greater than 1.
14. The computer program product of claim 11, wherein the identifying further comprises generating a histogram that represents a probability that a particular duration of time will be necessary to relocate all entities of the set of entities that are associated with a particular category of the set of categories.
15. The computer program product of claim 11, wherein the estimating the first complexity duration is performed as a further function of a sum of a set of compensated categorytier durations, and wherein each categorytier duration of the set of compensated categorytier durations identifies an estimated duration of time required to move all entities associated with the one category and with a selected tier of the set of tiers, and wherein the further function comprises weighting each categorytier duration of the set of compensated categorytier durations by an associated random number of the multitude of random numbers.
16. A computer system comprising one or more processors, a memory coupled to the one or more processors, and a computer-readable hardware storage device coupled to the one or more processors, the storage device containing program code configured to be run by the one or more processors via the memory to implement a method for using complexity probability to plan a datacenter relocation project, the method comprising:
the one or more processors receiving a description of a set of entities to be relocated by the datacenter relocation project;
the one or more processors associating each entity of the set of entities with a category of a set of categories and a tier of a set of tiers;
the one or more processors further receiving historical data that identifies a previous duration of time required to perform previous relocation projects;
the one or more processors identifying an initial set of durations as a function of the historical data, wherein each initial duration of the initial set of durations estimates how long it will take to relocate all entities of the set of entities that are associated with a unique combination of a category of the set of categories and a tier of the set of tiers;
the one or more processors generating a multitude of random numbers;
the one or more processors estimating a set of complexity-compensated relocation durations, wherein a first complexity duration of the set of complexity-compensated relocation durations is estimated as a function of a first duration of the initial set of durations and a first random number of the multitude of random numbers, and identifies a distinct amount of time required to relocate all entities of the set of entities that are associated with a one category of the set of categories.
17. The computer system of claim 16, further comprising:
the one or more processors identifying a probability that a relocation of a subset of entities of the set of entities that is associated with the one category will require a probable duration of time, wherein the identifying is performed as a function of the set of complexity-compensated relocation durations.
18. The computer system of claim 16, wherein a tier of the set of tiers identifies a degree of complexity of the entity.
19. The computer system of claim 16, wherein the random numbers are normalized prior to the estimating to a value no less than 0 and no greater than 1.
20. The computer system of claim 16, wherein the identifying further comprises generating a histogram that represents a probability that a particular duration of time will be necessary to relocate all entities of the set of entities that are associated with a particular category of the set of categories.