1. A semiconductor component, comprising:
a first passivation layer over a substrate;
a bond pad overlying the first passivation layer;
a second passivation layer overlying the first passivation layer and the bond pad, the second passivation layer having a first opening and a plurality of second openings, wherein the first opening overlies the bond pad, the plurality of the second openings exposes a top surface of the first passivation layer, and each second opening of the plurality of second openings is spaced from the first opening and from a conductive interconnect connected to the bond pad, wherein a region of the second passivation layer disposed between a first opening and a second opening of the plurality of second openings has a contiguous dielectric composition interfacing the first passivation layer and extending from the first opening to the second opening; at least one conductive interconnect underlying the second passivation layer, the at least one conductive interconnect connected to the bond pad and extending laterally away from the bond pad to a plurality of conductive vias disposed a distance from the bond pad, wherein a first group of the plurality of second openings surrounds the conductive interconnect and plurality of conductive vias;
a buffer layer overlying the second passivation layer and filling the plurality of second openings, the buffer layer having a third opening overlapping the first opening and together exposing a portion the bond pad, wherein the combined first opening and third opening has sidewalls; and
a conductive feature overlying the portion of the bond pad.
2. The semiconductor component of claim 1, wherein an exposing ratio of the plurality of second openings in the second passivation layer is between about 0.2 to about 0.8.
3. The semiconductor component of claim 1, wherein an aspect ratio of the plurality of second openings is between about 0.5 to about 1.9.
4. The semiconductor component of claim 1, wherein the plurality of second openings are in a random arrangement.
5. The semiconductor component of claim 1, wherein the conductive feature comprises a solder bump or a copper pillar.
6. The semiconductor component of claim 1, wherein the buffer layer comprises polyimide.
7. The semiconductor component of claim 1, further comprising an under bump metallurgy (UBM) layer between the conductive feature and the bond pad.
8. The semiconductor component of claim 7, wherein the UBM layer comprises multiple layers of conductive material.
9. The semiconductor component of claim 1, wherein the first passivation layer comprises a different material than the second passivation layer.
10. A semiconductor component, comprising:
a low-k dielectric layer over a substrate;
a bond pad over the low-k dielectric layer;
a first passivation layer over the low-k dielectric layer;
a second passivation layer over the bond pad, the low-k dielectric layer, and the first passivation layer, the second passivation layer having a first opening and a plurality of second openings each on a same side of the first opening with respect to the first opening, wherein the first opening overlies the bond pad, the plurality of second openings exposes a top surface of the first passivation layer, and each second opening of the plurality of second openings is spaced from the first opening and from a conductive interconnect connected to the bond pad;
a polyimide layer overlying the second passivation layer and filling the second openings, the polyimide layer having a third opening, wherein the first opening and the third opening form a combined opening having sidewalls to expose a portion of the bond pad;
a conductive feature overlying the portion of the bond pad; and
conductive interconnect underlying the second passivation layer, the conductive interconnect connecting to the bond pad and extending laterally away from the bond pad to a plurality of conductive vias disposed a distance from the bond pad, wherein a first group of the plurality of second openings surrounds the conductive interconnect and plurality of conductive vias.
11. The semiconductor component of claim 10, wherein an aspect ratio of the second openings is between about 0.5 to about 1.9.
12. The semiconductor component of claim 10, wherein the second openings are in a random arrangement.
13. The semiconductor component of claim 10, further comprising an interconnect layer within the low-k dielectric layer, the conductive feature electrically connected to the interconnect layer through the bond pad and the conductive interconnect.
14. The semiconductor component of claim 10, wherein the conductive feature comprises a solder bump or a copper pillar.
15. A semiconductor component,
comprising: a substrate;
a first passivation layer over the substrate;
a bond pad overlying the first passivation layer;
a second passivation layer overlying the first passivation layer and the bond pad, the second passivation layer having a first opening and a plurality of second openings, wherein the first opening overlies the bond pad, wherein a bottom surface of each of the plurality of the second openings is defined by a top surface of the first passivation layer, and each second opening of the plurality of second openings is spaced from the first opening and from a conductive interconnect connected to the bond pad; a conductive interconnect line underlying the second passivation layer, the conductive interconnect line connecting to the bond pad and extending laterally away from the bond pad to a plurality of conductive vias disposed a distance from the bond pad, wherein a first group of the plurality of second openings surrounds the conductive interconnect and plurality of conductive vias;
a buffer layer overlying the second passivation layer and filling the plurality of second openings, the buffer layer having a third opening overlapping the first opening and smaller than the first opening, the third opening exposing a portion the bond pad, wherein the third opening has sidewalls; and
a conductive feature overlying the portion of the bond pad.
16. The semiconductor component of claim 15, wherein the first passivation layer comprises a different material than the second passivation layer.
17. The semiconductor component of claim 15, the conductive interconnect line electrically connecting the bond pad to the conductive vias.
18. The semiconductor component of claim 15, further comprising an under bump metallurgy (UBM) layer between the conductive feature and the bond pad, the UBM layer comprises multiple layers of conductive material.
19. The semiconductor component of claim 15, wherein the second passivation layer interposing a first opening and a second opening of the plurality of second openings has a dielectric interface with the first passivation layer, the dielectric interface extending from the first opening to the second opening.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method for detecting an open-malfunction of a thermostat in a cooling system of an internal combustion engine, comprising:
detecting a coolant temperature on the engine side of the thermostat; and
determining, when the detected temperature reaches a predetermined temperature, an open-malfunction of the thermostat based on a predetermined reference and a period of time elapse required for the detected coolant temperature to reach the predetermined temperature from a predetermined time,
wherein the predetermined reference is set based on a condition of the cooling system detected at an engine start time.
2. The method as in claim 1, wherein the condition is the coolant temperature detected at the engine start time.
3. The method as in claim 1, wherein the period is calculated based on an accumulation of an intake air amount from the engine start time.
4. The method as in claim 1, wherein the period is calculated based on a number of ignitions in the engine from the engine start time.
5. The method as in claim 1, wherein the period is calculated based on a amount of heat radiation generated by the engine from the engine start time.
6. The method as in claim 1, wherein the malfunction determination is performed only when an engine start is detected to be a cold engine start based on the detected coolant temperature.
7. The method as in claim 1, wherein the malfunction determination is performed only when the engine is in an idle operation state.
8. The method as in claim 1, wherein the period is calculated based on an amount of heat radiation generated by the engine.
9. The method as in claim 8, wherein the amount of heat radiation is calculated based on a vehicle speed.
10. The method as in claim 8, wherein the amount of heat radiation is calculated based on an intake air temperature.
11. The method as in claim 8, wherein the amount of heat radiation is calculated based on an air conditioner operation condition.
12. A method for detecting an open-malfunction of a thermostat in a cooling system of an internal combustion engine, comprising:
detecting a coolant temperature on the engine side of the thermostat; and
determining, when the detected temperature reaches a predetermined temperature, an open-malfunction of the thermostat based on a predetermined reference and a predetermined parameter,
wherein the predetermined reference is set based on the coolant temperature detected at an engine start time.
13. The method as in claim 12, wherein the predetermined parameter is a period of time elapse required for the detected coolant temperature to reach the predetermined temperature from the engine start time.
14. The method as in claim 13, wherein the period is calculated based on an accumulation of an intake air amount from the engine start time.
15. The method as in claim 13, wherein the period is calculated based on a number of ignitions in the engine from the engine start time.
16. The method as in claim 13, wherein the period is calculated based on an amount of heat radiation generated by the engine from the engine start time.
17. The method as in claim 12, wherein the malfunction determination is performed only when an engine start is detected to be a cold engine start based on the detected coolant temperature.
18. The method as in claim 12, wherein the malfunction determination is performed only when the engine is in an idle operation state.
19. The method as in claim 13, wherein the period is calculated based on an amount of heat radiation generated by the engine.
20. The method as in claim 19, wherein the amount of heat radiation is calculated based on a vehicle speed.
21. The method as in claim 19, wherein the amount of heat radiation is calculated based on an intake air temperature.
22. The method as in claim 19, wherein the amount of heat radiation is calculated based on an air conditioner operation condition.
23. A method for detecting an open-malfunction of a thermostat in a cooling system of an internal combustion engine, comprising:
detecting a coolant temperature on the engine side of the thermostat; and
determining, when the detected temperature reaches a predetermined temperature, an open-malfunction of the thermostat based on a predetermined reference and a predetermined parameter,
wherein the malfunction determination uses the coolant temperature detected at an engine start time.
24. The method as in claim 23, wherein the predetermined parameter is a period of time elapse required for the detected coolant temperature to reach a predetermined temperature from an engine start time.
25. The method as in claim 24, wherein the period is calculated based on an accumulation of an intake air amount from the engine start time.
26. The method as in claim 24, wherein the period is calculated based on a number of ignitions in the engine from the engine start time.
27. The method as in claim 24, wherein the period is calculated based on an amount of heat radiation generated by the engine from the engine start time.
28. The method as in claim 23, wherein the malfunction determination is performed only when an engine start is detected to be a cold engine start based on the detected coolant temperature.
29. The method as in claim 23, wherein the malfunction determination is performed only when the engine is in an idle operation state.
30. The method as in claim 24, wherein the period is calculated based on an amount of heat radiation generated by the engine.
31. The method as in claim 30, wherein the amount of heat radiation is calculated based on a vehicle speed.
32. The method as in claim 30, wherein the amount of heat radiation is calculated based on an intake air temperature.
33. The method as in claim 24, wherein the amount of heat radiation is calculated based on an air conditioner operation condition.
34. The method as in claim 3, wherein an open-malfunction of the thermostat is determined based on a comparison of the accumulation of an intake air amount required for the detected coolant temperature with the predetermined reference.
35. The method as in claim 14, wherein an open-malfunction of the thermostat is determined based on a comparison of the accumulation of an intake air amount required for the detected coolant temperature with the predetermined reference.
36. The method as in claim 25, wherein an open-malfunction of the thermostat is determined based on a comparison of the accumulation of an intake air amount required for the detected coolant temperature with the predetermined reference.