1-13. (canceled)
14. A method for providing telephone number portability, comprising:
decoding a key into a profile that indicates an operation to be performed on a dialed number, the key comprising the dialed number; and
creating a profile to produce a ported telephone number corresponding to the dialed number.
15. The method according to claim 14, wherein the created profile indicates to transform the dialed number into an international number according to an international telephone number encoding format.
16. The method according to claim 14, wherein the created profile indicates to transform the dialed number into a national number according to a number encoding format.
17. The method according to claim 14, wherein the created profile indicates to add a prefix to the dialed number.
18. The method according to claim 14, wherein the created profile indicates to insert a string into the dialed number at a given location.
19. The method according to claim 14, wherein the created profile indicates to replace a string of the dialed number at a given location and length.
20. An apparatus for telephone number portability, comprising:
a digit tree for decoding a key representing a dialed number; and
an output of the digit tree pointing to a profile node, the profile node indicating an operation to be performed on the dialed number to produce a ported telephone number.
21. The apparatus according to claim 20, wherein the digit tree comprises a multiplexor that decode a digit of the dialed number.
22. The apparatus according to claim 21, wherein the digit tree comprises a plurality of multiplexors that decode each digit of the dialed number.
23. The apparatus according to claim 20, wherein the digit tree is embodied in accordance with requirements of a number portability database.
24. The apparatus according to claim 20, further comprising a counter that counts a number of profiles.
25. A number portability database apparatus for telephone number portability, comprising:
a digit tree for decoding a key representing a dialed number;
a result node that outputs a numerical value indicating a ported number corresponding to the number dialed; and
a profile node that indicates from an output of the digit tree pointing to the profile node a manner in which the original number dialed is to be operated to produce a ported telephone number corresponding to the dialed number.
26. The apparatus to according to claim 25, further comprising a counter for counting a number of profiles.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. An apparatus for generating a decryption key for use to decrypt a block of encrypted instruction data being fetched from an instruction cache in a microprocessor at a fetch address, the apparatus comprising:
a first multiplexer, configured to select a first key value from a plurality of key values based on a first portion of the fetch address;
a second multiplexer, configured to select a second key value from the plurality of key values based on the first portion of the fetch address;
a hardware rotater, configured to rotate the first key value based on a second portion of the fetch address; and
an arithmetic unit, configured to selectively add or subtract the rotated first key value to or from the second key value based on a third portion of the fetch address to generate the decryption key; and
wherein the plurality of key values from which the first and second key values are selected is subject to an update prior to selection by the first and second multiplexers.
2. The apparatus of claim 1, wherein the decryption key is generated for use by the microprocessor to Boolean exclusive-OR (XOR) the generated decryption key with the fetched block of encrypted instruction data to decrypt the block.
3. The apparatus of claim 1, wherein the apparatus is configured to generate the decryption key in less time than required to fetch the encrypted instruction data from the instruction cache at the fetch address.
4. The apparatus of claim 1, wherein the apparatus is configured to yield an effective decryption key length over a plurality of consecutive blocks of encrypted instruction data of approximately W2*(K!(2*(K\u22122)!)) bytes, wherein the width of the decryption key and of the first and second key values is W bytes, wherein the plurality of key values is K.
5. The apparatus of claim 1, wherein plain text data decrypted from the encrypted instruction data using the decryption key is unobservable outside the microprocessor.
6. The apparatus of claim 1, further comprising:
a control bit, configured to store an indication of whether the microprocessor is in a decryption mode or a plain text mode;
wherein the decryption key is generated for use by the microprocessor to Boolean exclusive-OR (XOR) the generated decryption key with the fetched block of encrypted instruction data to decrypt the block if the microprocessor is in the decryption mode;
wherein the fetched block of encrypted instruction data is Boolean XORed with zeroes if the microprocessor is in the plain text mode.
7. The apparatus of claim 1, wherein the update is performed in response to execution of an instruction that instructs the microprocessor to perform the update.
8. The apparatus of claim 7, wherein the instruction further instructs the microprocessor to conditionally branch and to perform the update only if the branch is taken.
9. The apparatus of claim 1, wherein the update is performed in response to a task switch of the microprocessor.
10. The apparatus of claim 1, wherein the update is performed in response to execution of a return from interrupt instruction by the microprocessor.
11. A method for generating a decryption key for use to decrypt a block of encrypted instruction data being fetched from an instruction cache in a microprocessor at a fetch address, the method comprising:
selecting a first key value from a plurality of key values based on a first portion of the fetch address;
selecting a second key value from the plurality of key values based on the first portion of the fetch address;
rotating the first key value based on a second portion of the fetch address; and
selectively adding or subtracting the rotated first key value to or from the second key value based on a third portion of the fetch address to generate the decryption key; and
wherein the plurality of key values from which the first and second key values are selected is subject to an update prior to said selecting.
12. The method of claim 11, wherein the decryption key is generated for use by the microprocessor to Boolean exclusive-OR (XOR) the generated decryption key with the fetched block of encrypted instruction data to decrypt the block.
13. The method of claim 11, wherein the method for generating the decryption key is performed in less time than required to fetch the encrypted instruction data from the instruction cache at the fetch address.
14. The method of claim 11, wherein over a plurality of consecutive blocks of encrypted instruction data, an effective decryption key length is yielded of approximately W2*(K!(2*(K\u22122)!)) bytes, wherein the width of the decryption key and of the first and second key values is W bytes, wherein the plurality of key values is K.
15. The method of claim 11, wherein the update is performed in response to execution of an instruction that instructs the microprocessor to perform the update.
16. The method of claim 11, wherein the update is performed in response to a task switch of the microprocessor.
17. A computer program product encoded in at least one non-transitory computer usable medium for use with a computing device, the computer program product comprising:
computer usable program code embodied in said medium, for specifying an apparatus for generating a decryption key for use to decrypt a block of encrypted instruction data being fetched from an instruction cache in a microprocessor at a fetch address, the computer usable program code comprising:
first program code for specifying a first multiplexer, configured to select a first key value from a plurality of key values based on a first portion of the fetch address;
second program code for specifying a second multiplexer, configured to select a second key value from the plurality of key values based on the first portion of the fetch address;
third program code for specifying a rotater, configured to rotate the first key value based on a second portion of the fetch address; and
fourth program code for specifying an arithmetic unit, configured to selectively add or subtract the rotated first key value to or from the second key value based on a third portion of the fetch address to generate the decryption key; and
wherein the plurality of key values from which the first and second key values are selected is subject to an update prior to selection by the first and second multiplexers.
18. The computer program product of claim 17, wherein the at least one non-transitory computer usable medium is selected from the set of a disk, tape, or other magnetic, optical, or electronic storage medium.