1460951063-ebae2494-0a83-4b2d-8b95-1b26ade0ba5e

1. An information processing device comprising:
an antenna circuit; and
a readerwriter device including a received signal generating circuit, a microcomputer, a transmitted signal generating circuit, a level detecting circuit, and a DA converter,
wherein the received signal generating circuit is connected to the microcomputer and the antenna circuit;
the transmitted signal generating circuit is connected to the microcomputer and the antenna circuit;
the DA converter is connected to the microcomputer and the antenna circuit;
the level detecting circuit is connected to the microcomputer and the antenna circuit; and
the antenna circuit includes an antenna, a resonant capacitor, and a variable capacitor.
2. The information processing device according to claim 1, wherein the level detecting circuit comprises a diode, a capacitor, and an AD converter.
3. The information processing device according to claim 1, wherein the level detecting circuit comprises a diode, a capacitor, an AD converter, and choke coil.
4. The information processing device according to claim 1, wherein the variable capacitor comprises a variable capacitance diode, a coupling capacitor, and a voltage supply resistor.
5. The information processing device according to claim 1, wherein the antenna is any one of a dipole antenna, a patch antenna, a loop antenna, and a Yagi antenna.
6. An information processing device comprising:
an antenna circuit; and
a readerwriter device including a received signal generating circuit, a transmitted signal generating circuit, a level detecting circuit, a first DA converter, a second DA converter, a microcomputer, and a matching circuit,
wherein the received signal generating circuit is connected to the microcomputer and the antenna circuit;
the transmitted signal generating circuit is connected to the microcomputer and the antenna circuit;
the first DA converter is connected to the microcomputer and the antenna circuit;
the second DA converter is connected to the microcomputer and the matching circuit;
the level detecting circuit is connected to the microcomputer and the antenna circuit;
the antenna circuit includes an antenna, a resonant capacitor, and a first variable capacitor; and
the matching circuit includes a second variable capacitor.
7. The information processing device according to claim 6, wherein the level detecting circuit comprises a diode, a capacitor, and an AD converter.
8. The information processing device according to claim 6, wherein the level detecting circuit comprises a diode, a capacitor, an AD converter, and choke coil.
9. The information processing device according to claim 6, wherein at least one of the first variable capacitor and the second variable capacitor comprises a variable capacitance diode, a coupling capacitor, and a voltage supply resistor.
10. The information processing device according to claim 6, wherein the antenna is any one of a dipole antenna, a patch antenna, a loop antenna, and a Yagi antenna.
11. An information processing device comprising:
an antenna circuit including an antenna, a resonant capacitor, and a variable capacitor;
a received signal generating circuit that demodulates a voltage signal received by the antenna circuit and outputs the demodulated voltage signal to a microcomputer;
a transmitted signal generating circuit that modulates a voltage signal outputted from the microcomputer and transmits the modulated voltage signal to the antenna circuit;
a DA converter for outputting a voltage signal for changing capacitance of the variable capacitor; and
a level detecting circuit that detects an output value of the antenna circuit when the modulated voltage signal and the voltage signal for changing capacitance of the variable capacitor from the DA converter are inputted and that outputs the output value to the microcomputer.
12. The information processing device according to claim 11, wherein the level detecting circuit comprises a diode, a capacitor, and an AD converter.
13. The information processing device according to claim 11, wherein the level detecting circuit comprises a diode, a capacitor, an AD converter, and choke coil.
14. The information processing device according to claim 11, wherein the level detecting circuit regularly detects the output value.
15. The information processing device according to claim 11, wherein the variable capacitor comprises a variable capacitance diode, a coupling capacitor, and a voltage supply resistor.
16. The information processing device according to claim 11, wherein the antenna is any one of a dipole antenna, a patch antenna, a loop antenna, and a Yagi antenna.
17. An information processing device comprising:
an antenna circuit including an antenna, a resonant capacitor, and a first variable capacitor;
a received signal generating circuit that demodulates a voltage signal received by the antenna circuit and outputs the demodulated voltage signal to a microcomputer;
a transmitted signal generating circuit that modulates a voltage signal outputted from the microcomputer and transmits the modulated voltage signal to the antenna circuit;
a matching circuit including a second variable capacitor;
a first DA converter for outputting a voltage signal for changing capacitance of the first variable capacitor;
a second DA converter for outputting a voltage signal for changing capacitance of the second variable capacitor; and
a level detecting circuit that detects an output value of the antenna circuit when the modulated voltage signal and the voltage signal for changing capacitance of the first variable capacitor from the first DA converter are inputted and that outputs the output value to the microcomputer.
18. The information processing device according to claim 17, wherein the level detecting circuit comprises a diode, a capacitor, and an AD converter.
19. The information processing device according to claim 17, wherein the level detecting circuit comprises a diode, a capacitor, an AD converter, and choke coil.
20. The information processing device according to claim 17, wherein the level detecting circuit regularly detects the output value.
21. The information processing device according to claim 17, wherein at least one of the first variable capacitor and the second variable capacitor comprises a variable capacitance diode, a coupling capacitor, and a voltage supply resistor.
22. The information processing device according to claim 17, wherein the antenna is any one of a dipole antenna, a patch antenna, a loop antenna, and a Yagi antenna.
23. A method for calibrating a resonant frequency of an information processing device,
said information processing device comprising:
an antenna circuit including a variable capacitor;
a transmitted signal generating circuit connected to a microcomputer and the antenna circuit;
a DA converter connected to the microcomputer and the variable capacitor; and
a level detecting circuit connected to the microcomputer and the antenna circuit,

said method comprising the steps of:
outputting first signal from the antenna circuit in accordance with a signal outputted from the transmitted signal generating circuit to the antenna circuit;
changing a signal outputted from the antenna circuit to second signal by changing an outputted voltage from the DA converter to the variable capacitor;
setting an output voltage of a signal outputted from the antenna circuit by outputting signals to the transmitted signal generating circuit and the DA converter from the microcomputer by inputting voltage signals of the first signal and the second signal outputted from the antenna circuit to the microcomputer via the level detecting circuit.
24. The method for calibrating a resonant frequency of an information processing device according to claim 23, wherein the level detecting circuit comprises a diode, a capacitor, and an AD converter.
25. The method for calibrating a resonant frequency of an information processing device according to claim 23, wherein the level detecting circuit comprises a diode, a capacitor, an AD converter, and choke coil.
26. The method for calibrating a resonant frequency of an information processing device according to claim 23, wherein the variable capacitor comprises a variable capacitance diode, a coupling capacitor, and a voltage supply resistor.
27. The method for calibrating a resonant frequency of an information processing device according to claim 23, wherein the antenna is any one of a dipole antenna, a patch antenna, a loop antenna, and a Yagi antenna.
28. The method for calibrating a resonant frequency of an information processing device according to claim 23, wherein the microcomputer sets a signal outputted to one of the transmitted signal generating circuit, the first DA converter and the second DA converter so as to maximize an output of a signal from the antenna circuit.
29. A method for calibrating a resonant frequency of an information processing device,
said information processing device comprising:
an antenna circuit including a first variable capacitor;
a transmitted signal generating circuit connected to a microcomputer and the antenna circuit;
a matching circuit including a second variable capacitor;
a first DA converter connected to the microcomputer and the first variable capacitor; and
a second DA converter connected to the microcomputer and the second variable capacitor; and
a level detecting circuit connected to the microcomputer and the antenna circuit,

said method comprising the steps of:
outputting first signal from the antenna circuit in accordance with a signal outputted from the transmitted signal generating circuit to the antenna circuit;
changing a signal outputted from the antenna circuit to second signal by changing an outputted voltage from the first DA converter to the first variable capacitor;
setting an output voltage of a signal outputted from the antenna circuit by outputting a signal to the transmitted signal generating circuit and the first DA converter from the microcomputer by inputting voltage signals of the first signal and the second signal outputted from the antenna circuit to the microcomputer via the level detecting circuit;
outputting third signal from the antenna circuit in accordance with a signal outputted from the transmitted signal generating circuit to the antenna circuit;
changing a signal outputted from the antenna circuit to fourth signal by changing an outputted voltage from the second DA converter to the second variable capacitor;
setting an output voltage of a signal outputted from the antenna circuit by outputting signals to the transmitted signal generating circuit and the second DA converter from the microcomputer by inputting voltage signals of the third signal and the fourth signal outputted from the antenna circuit to the microcomputer via the level detecting circuit.
30. The method for calibrating a resonant frequency of an information processing device according to claim 29, wherein the level detecting circuit comprises a diode, a capacitor, and an AD converter.
31. The method for calibrating a resonant frequency of an information processing device according to claim 29, wherein the level detecting circuit comprises a diode, a capacitor, an AD converter, and choke coil.
32. The method for calibrating a resonant frequency of an information processing device according to claim 29, wherein at least one of the first variable capacitor and the second variable capacitor comprises a variable capacitance diode, a coupling capacitor, and a voltage supply resistor.
33. The method for calibrating a resonant frequency of an information processing device according to claim 29, wherein the antenna is any one of a dipole antenna, a patch antenna, a loop antenna, and a Yagi antenna.
34. The method for calibrating a resonant frequency of an information processing device according to claim 29, wherein the microcomputer sets a signal outputted to one of the transmitted signal generating circuit, the first DA converter and the second DA converter so as to maximize an output of a signal from the antenna circuit.
35. A method for calibrating a resonant frequency of an information processing device,
said information processing device comprising:
an antenna circuit including a first variable capacitor;
a transmitted signal generating circuit connected to a microcomputer and the antenna circuit;
a matching circuit including a second variable capacitor;
a first DA converter connected to the microcomputer and the first variable capacitor; and
a second DA converter connected to the microcomputer and the second variable capacitor; and
a level detecting circuit connected to the microcomputer and the antenna circuit,

said method comprising the steps of:
outputting first signal from the antenna circuit in accordance with a signal outputted from the transmitted signal generating circuit to the antenna circuit;
changing a signal outputted from the antenna circuit to second signal by changing an outputted voltage from the second DA converter to the second variable capacitor;
setting an output voltage of a signal outputted from the antenna circuit by outputting a signal to the transmitted signal generating circuit and the second DA converter from the microcomputer by inputting voltage signals of the first signal and the second signal outputted from the antenna circuit to the microcomputer via the level detecting circuit;
outputting third signal from the antenna circuit in accordance with a signal outputted from the transmitted signal generating circuit to the antenna circuit;
changing a signal outputted from the antenna circuit to fourth signal by changing an outputted voltage from the first DA converter to the first variable capacitor;
setting an output voltage of a signal outputted from the antenna circuit by outputting signals to the transmitted signal generating circuit and the first DA converter from the microcomputer by inputting voltage signals of the third signal and the fourth signal outputted from the antenna circuit to the microcomputer via the level detecting circuit.
36. The method for calibrating a resonant frequency of an information processing device according to claim 35, wherein the level detecting circuit comprises a diode, a capacitor, and an AD converter.
37. The method for calibrating a resonant frequency of an information processing device according to claim 35, wherein the level detecting circuit comprises a diode, a capacitor, an AD converter, and choke coil.
38. The method for calibrating a resonant frequency of an information processing device according to claim 35, wherein at least one of the first variable capacitor and the second variable capacitor comprises a variable capacitance diode, a coupling capacitor, and a voltage supply resistor.
39. The method for calibrating a resonant frequency of an information processing device according to claim 35, wherein the antenna is any one of a dipole antenna, a patch antenna, a loop antenna, and a Yagi antenna.
40. The method for calibrating a resonant frequency of an information processing device according to claim 35, wherein the microcomputer sets a signal outputted to one of the transmitted signal generating circuit, the first DA converter and the second DA converter so as to maximize an output of a signal from the antenna circuit.

The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.

1. A machine for making cotton candy including: a shell (2); a sugar-spinning unit (3) including: a heater (31) located in and connected to the shell (2) for heating and melting sugar; a bowl (32) coaxially located around the heater (31); a lid (33) located on the bowl (32) and formed with a first slot (331); and a primary motor (30) for spinning the heater (31) and the bowl (32) to spin the molten sugar into the bowl (32) from the heater (31); and a scraping unit (7) including: a holder (70) including two plates located in and connected to the shell (2), with a gap (700) defined between the two plates; a stopper (701) connected to the holder (70); a lever (72) including a second slot (721) defined therein; a first scraper (722) connected to the lever (72); a second scraper (71) pivotally connected to the plates of the holder (70); a hook (711) connected to the second scraper (71) and adapted to hook the lever (72); an axle (74) inserted in the holder (70) and the lever (72) and the second scrapper (71); a tensile spring (75) for connecting the second scraper (71) to the lever (72); a difference motor (73) including a mandrel (730); a crank (76) including an end connected to the mandrel (730) of the difference motor (73); and a pin (760) connected to an opposite end of the crank (76) and movably inserted in the second slot (721) defined in the lever (72), wherein the lever (72) and the second scraper (71) can be pivoted, by the difference motor (73) via the crank (76) and the tensile spring (75), into the bowl (32) through the first slot (331) defined in the lid (33), wherein the lever (72) can continue to be pivoted after the second scraper (71) is stopped by the stopper (701) so that the first scraper (722) is located against an internal side of the bowl (32) to scrap stains of sugar from the bowl (32), wherein the lever (72) and second scraper (71) can be pivoted back so that the second scraper (71) is released from the stopper (701) and pivoted past the first scraper (722) by the tensile spring (75) to scrap the stains of sugar from the first scraper (722).
2. The machine according to claim 1, wherein the first scraper (722) includes third slots (723) through which screws (725) are driven into the lever (72) so that the position of the first scraper (722) relative to the lever (72) is adjustable.
3. The machine according to claim 2, wherein the first scraper (722) includes bosses (724) movably located in a related one of the third slots (723) defined in the first scraper (722).
4. The machine according to claim 1, wherein the tensile spring (75) includes an end connected to a short section of the second scraper (71) and another end connected to a short section (720) of the lever (72).
5. The machine according to claim 1, including a bearing (761) located around the pin (760).
6. The machine according to claim 1, including a sensor (77) connected to the holder (70) for detecting the crank (76).