1. A variable resistance memory device comprising:
a first common line;
a second common line;
plural memory cells each formed by serially connecting a memory element, resistance of which changes according to applied voltage, and an access transistor between the second common line and the first common line;
a common line pass transistor connected between the first common line and a supply node for predetermined voltage; and
a driving circuit that controls voltage of the second common line, the predetermined voltage, and voltage of a control node of the common line pass transistor and drives the memory cells.
2. A variable resistance memory device according to claim 1, wherein the driving circuit includes a driving voltage circuit that controls to invert polarity of the predetermined voltage, for which the voltage of the second common line is set as a reference, when the memory element is transitioned from one of a high resistance state and a low resistance state to the other and when the memory element is transitioned from the other to one of the resistance states with respect to each of the plural memory cells.
3. A variable resistance memory device according to claim 2, wherein the driving circuit includes:
a gate driver circuit for the common line pass transistor that current-drives the first common line when cell resistance of the memory cell is reduced and voltage-drives the first common line when the cell resistance of the memory cell is increased; and
a driving voltage circuit that controls, when the gate driver circuit current-drives the common line pass transistor of an N type, the predetermined voltage to a value lower than the voltage of the second common line and controls, when the gate driver circuit voltage-drives the common line pass transistor of the N type, the predetermined voltage to a value higher than the voltage of the second common line.
4. A variable resistance memory device according to claim 2, wherein the driving circuit includes:
a gate driver circuit for the common line pass transistor that current-drives the first common line when cell resistance of the memory cell is reduced and voltage-drives the first common line when the cell resistance of the memory cell is increased; and
a driving voltage circuit that controls, when the gate driver circuit current-drives the common line pass transistor of a P type, the predetermined voltage to a value higher than the voltage of the second common line and controls, when the gate driver circuit voltage-drives the common line pass transistor of the P type, the predetermined voltage to a value lower than the voltage of the second common line.
5. A variable resistance memory device according to claim 1, wherein
the memory cell includes a supply layer for conductive ions between two electrodes and a resistance change layer that is set in contact with the supply layer for the conductive ions and to which the conductive ions are injected from the supply layer for the conductive ions or from which the injected conductive ions are returned to the supply layer according to applied voltage between the two electrodes.
6. A variable resistance memory device according to claim 1, wherein the driving circuit controls, according to a result of verify readout performed in every application of a pulse that continues for time in which the common line pass transistor is on, a number of times of application of the pulse when the memory element is transitioned from one of a high resistance state and a low resistance state to the other and when the memory element is transitioned from the other to one of the resistance states with respect to each of the plural memory cells.
7. A variable resistance memory device according to claim 1, wherein
plural access lines for controlling control voltage of the access transistor are provided, and
a binary-voltage driven access control circuit that controls on and off of the access transistor in an access target memory cell is connected to the plural access lines.
8. A variable resistance memory device according to claim 1, wherein
a memory cell array is formed by arranging, by plural columns, column configuring sections of the memory cell array in which the plural memory cells and the common line pass transistor are connected for each the first common line, and
the second common line is connected in common to the plural column configuring sections.
9. A variable resistance memory device according to claim 8, wherein
the column configuring sections are arranged in pairs in a direction same as a direction of arrangement of the memory cells, and
the one common line pass transistor is connected in common to a pair of the column configuring sections.
10. A variable resistance memory device according to claim 1, wherein the common line pass transistor also functions as a column switch that connects the first common line and a driver for write, erase, and readout of data.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. An optoelectronic arrangement, comprising:
at least one laser component, and
a heating device for heating the laser component up to a constant temperature in such a way that the laser component is operated at a temperature that is greater than the highest temperature to be expected that would be present during operation of the laser component without the heating device, wherein the optoelectronic arrangement excludes a cooling device for actively cooling the laser component.
2. The optoelectronic arrangement as claimed in claim 1, wherein the heating device is integrated in the laser component.
3. The optoelectronic arrangement as claimed in claim 2, wherein the heating device comprises a resistance conductor track.
4. The optoelectronic arrangement as claimed in claim 3, wherein the resistance conductor track runs near an active laser channel of the laser component.
5. The optoelectronic arrangement as claimed in claim 1, further comprising a carrier substrate on which the laser component is mounted.
6. The optoelectronic arrangement as claimed in claim 5, wherein the heating device heats the carrier substrate.
7. The optoelectronic arrangement as claimed in claim 1, further comprising a device for detecting the temperature of the laser component.
8. The optoelectronic arrangement as claimed in claim 7, wherein the device for detecting the temperature of the laser component comprises a temperature sensor whose signal is fed to a control device for controlling the temperature of the laser component.
9. The optoelectronic arrangement as claimed in claim 7, wherein the device for detecting the temperature of the laser component is arranged on the carrier substrate.
10. The optoelectronic arrangement as claimed in claim 1, further comprising a device for the direct optical detection of the emitted wavelength of the laser component, the output signal of this device being fed to a controlling device for controlling the temperature of the laser component.
11. The optoelectronic arrangement as claimed in claim 10, wherein the device for the direct optical detection of the emitted wavelength of the laser component comprises a first and a second photodiode that are both irradiated with a fraction of the light emitted by the laser component, the first photodiode having an optical sharp cutoff filter associated therewith whose transmitted optical power is a function of the emitted wavelength of the laser component.
12. The optoelectronic arrangement as claimed in claim 11, wherein the two photodiodes are arranged next to one another.
13. The optoelectronic arrangement as claimed in claim 11, wherein light from the laser component is directed onto the photodiodes via a deflecting mirror.
14. The optoelectronic arrangement as claimed in claim 11, wherein the laser component and the photodiodes are positioned relative to one another in such a way that light from the laser component is directed directly onto the photodiodes.
15. The optoelectronic arrangement as claimed in claim 1, wherein the individual components of the arrangement are arranged in a hermetically sealed housing of small design.
16. The optoelectronic arrangement as claimed in claim 15, wherein the individual components of the arrangement are arranged in a TO package.
17. The optoelectronic arrangement as claimed in claim 1, wherein the laser component is designed as a laser chip with two electric connector contacts.
18. A method for operating a laser component, comprising:
determining a highest temperature of the laser component to be expected during operation of the laser component without a heating thereof;
heating the laser component up to a constant temperature that is greater than the determined highest temperature to be expected that would be present during operation of the laser component without the heating thereof, wherein the heating excludes active cooling of the laser component; and
operating the laser component at the constant temperature.
19. The method as claimed in claim 18, wherein the laser component is heated directly.
20. The method as claimed in claim 18, wherein heating the laser component comprises heating a component on which the laser component is arranged.
21. The method as claimed in claim 18, further comprising detecting the temperature of the laser component and using the detected temperature for controlling the heating operation.
22. The method as claimed in claim 18, further comprising detecting a wavelength emitted by the laser component in a direct optical fashion and using the detected wavelength information to control the heating operation.
23. The method as claimed in claim 22, wherein the wavelength emitted by the laser component is detected in a direct optical fashion, and wherein such detection comprises:
detecting a first signal whose magnitude is a function of emitted wavelength of the laser component,
detecting a second signal which is proportional to the emitted optical power of the laser diode,
forming a quotient of the two signals,
determining a currently emitted wavelength of the laser diode from the quotient, and
using the determined emitted wavelength information to control the temperature of the laser component by controlling the heating operation appropriately.