1. A method of Direct Memory Access (\u2018DMA\u2019) transfer completion notification, the method comprising:
inserting, by an origin DMA engine on an origin compute node in an injection first-in-first-out (\u2018FIFO\u2019) buffer, a data descriptor for an application message to be transferred to a target compute node on behalf of an application on the origin compute node;
inserting, by the origin DMA engine, a completion notification descriptor in the injection FIFO buffer after the data descriptor for the application message, the completion notification descriptor specifying an address of a completion notification field in application storage for the application;
transferring, by the origin DMA engine to the target compute node, the application message in dependence upon the data descriptor; and
notifying, by the origin DMA engine, the application that the transfer of the application message is complete, including performing a local direct put operation to store predesignated notification data at the address of the completion notification field.
2. The method of claim 1 wherein:
the completion notification descriptor specifies an address in DMA storage containing the predesignated notification data; and
performing a local direct put operation to store predesignated notification data at the address of the completion notification field further comprises:
retrieving the predesignated notification data from the address in DMA storage, and
storing the predesignated notification data at the address of the completion notification field in the application storage for the application.
3. The method of claim 1 wherein:
inserting, by an origin DMA engine on an origin compute node in an injection FIFO buffer, a data descriptor for an application message further comprises receiving the data descriptor from a messaging module on the origin compute node; and
inserting, by the origin DMA engine, a completion notification descriptor in the injection FIFO buffer after the data descriptor for the application message further comprises receiving the completion notification descriptor from the messaging module on the origin compute node.
4. The method of claim 1 wherein:
the data descriptor specifies a shared DMA counter; and
transferring, by the origin DMA engine to the target compute node, the application message in dependence upon the data descriptor further comprises disregarding, by the origin DMA engine, a value for the shared DMA counter.
5. The method of claim 1 wherein:
the completion notification descriptor specifies a shared DMA counter; and
notifying, by the origin DMA engine, the application that transfer of the application message is complete further comprises disregarding, by the origin DMA engine, a value for the shared DMA counter.
6. The method of claim 1 wherein the origin compute node and the target compute node are comprised in a parallel computer, the parallel computer comprising a plurality of compute nodes connected for data communications through a data communications network, the data communications network optimized for point to point data communications.
7. An origin compute node capable of Direct Memory Access (\u2018DMA\u2019) transfer completion notification, the compute node comprising a DMA controller, an origin DMA engine installed upon the DMA controller, a computer processor, and computer memory operatively coupled to the computer processor, the DMA controller, and the origin DMA engine, the computer memory having disposed within it computer program instructions performing the steps of:
inserting, by an origin DMA engine on an origin compute node in an injection first-in-first-out (\u2018FIFO\u2019) buffer, a data descriptor for an application message to be transferred to a target compute node on behalf of an application on the origin compute node;
inserting, by the origin DMA engine, a completion notification descriptor in the injection FIFO buffer after the data descriptor for the application message, the completion notification descriptor specifying an address of a completion notification field in application storage for the application;
transferring, by the origin DMA engine to the target compute node, the application message in dependence upon the data descriptor; and
notifying, by the origin DMA engine, the application that the transfer of the application message is complete, including performing a local direct put operation to store predesignated notification data at the address of the completion notification field.
8. The origin compute node of claim 7 wherein:
the completion notification descriptor specifies an address in DMA storage containing the predesignated notification data; and
performing a local direct put operation to store predesignated notification data at the address of the completion notification field further comprises:
retrieving the predesignated notification data from the address in DMA storage, and
storing the predesignated notification data at the address of the completion notification field in the application storage for the application.
9. The origin compute node of claim 7 wherein:
inserting, by an origin DMA engine on an origin compute node in an injection FIFO buffer, a data descriptor for an application message further comprises receiving the data descriptor from a messaging module on the origin compute node; and
inserting, by the origin DMA engine, a completion notification descriptor in the injection FIFO buffer after the data descriptor for the application message further comprises receiving the completion notification descriptor from the messaging module on the origin compute node.
10. The origin compute node of claim 7 wherein:
the data descriptor specifies a shared DMA counter; and
transferring, by the origin DMA engine to the target compute node, the application message in dependence upon the data descriptor further comprises disregarding, by the origin DMA engine, a value for the shared DMA counter.
11. The origin compute node of claim 7 wherein:
the completion notification descriptor specifies a shared DMA counter; and
notifying, by the origin DMA engine, the application that transfer of the application message is complete further comprises disregarding, by the origin DMA engine, a value for the shared DMA counter.
12. The origin compute node of claim 7 wherein the origin compute node and the target compute node are comprised in a parallel computer, the parallel computer comprising a plurality of compute nodes connected for data communications through a data communications network, the data communications network optimized for point to point data communications.
13. A computer program product for Direct Memory Access (\u2018DMA\u2019) transfer completion notification, the computer program product disposed upon a recordable, computer readable medium, the computer program product comprising computer program instructions performing the steps of:
inserting, by an origin DMA engine on an origin compute node in an injection first-in-first-out (\u2018FIFO\u2019) buffer, a data descriptor for an application message to be transferred to a target compute node on behalf of an application on the origin compute node;
inserting, by the origin DMA engine, a completion notification descriptor in the injection FIFO buffer after the data descriptor for the application message, the completion notification descriptor specifying an address of a completion notification field in application storage for the application;
transferring, by the origin DMA engine to the target compute node, the application message in dependence upon the data descriptor; and
notifying, by the origin DMA engine, the application that the transfer of the application message is complete, including performing a local direct put operation to store predesignated notification data at the address of the completion notification field.
14. The computer program product of claim 13 wherein:
the completion notification descriptor specifies an address in DMA storage containing the predesignated notification data; and
performing a local direct put operation to store predesignated notification data at the address of the completion notification field further comprises:
retrieving the predesignated notification data from the address in DMA storage, and
storing the predesignated notification data at the address of the completion notification field in the application storage for the application.
15. The computer program product of claim 13 wherein:
inserting, by an origin DMA engine on an origin compute node in an injection FIFO buffer, a data descriptor for an application message further comprises receiving the data descriptor from a messaging module on the origin compute node; and
inserting, by the origin DMA engine, a completion notification descriptor in the injection FIFO buffer after the data descriptor for the application message further comprises receiving the completion notification descriptor from the messaging module on the origin compute node.
16. The computer program product of claim 13 wherein:
the data descriptor specifies a shared DMA counter; and
transferring, by the origin DMA engine to the target compute node, the application message in dependence upon the data descriptor further comprises disregarding, by the origin DMA engine, a value for the shared DMA counter.
17. The computer program product of claim 13 wherein:
the completion notification descriptor specifies a shared DMA counter; and
notifying, by the origin DMA engine, the application that transfer of the application message is complete further comprises disregarding, by the origin DMA engine, a value for the shared DMA counter.
18. The computer program product of claim 13 wherein the origin compute node and the target compute node are comprised in a parallel computer, the parallel computer comprising a plurality of compute nodes connected for data communications through a data communications network, the data communications network optimized for point to point data communications.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method comprising:
inserting a stimulus delay between receipt of a stimulus from a virtual reality environment and input of the stimulus to an artificial intelligence motion control system to produce a delayed stimulus, the stimulus delay being at least one simulation interval;
generating a control signal to control motion of an artificial intelligence controlled player based on the delayed; and
wherein a length of the stimulus delay is changeable between different game sessions in the virtual reality environment.
2. The method of claim 1 wherein the length of the stimulus delay is changeable between different simulation intervals.
3. The method of claim 1 wherein the length of the stimulus delay for a given stimulus is different for different artificial intelligence controlled players in the virtual reality environment.
4. The method of claim 1 wherein the inserting operation comprises:
receiving the stimulus into a stimuli buffer to delay input of the stimulus to the artificial intelligence motion control system.
5. The method of claim 1 wherein the stimulus is of a first type of stimulus, the stimulus delay is a first stimulus delay, and further comprising:
inserting a second stimulus delay between receipt of a second type of stimulus from the virtual reality environment and input of the second type of stimulus to the artificial intelligence motion control system, the second stimulus delay being greater than the first stimulus delay.
6. The method of claim 1 wherein the generating operation comprises:
generating a control signal for a current simulation interval using stimulus from a previous simulation interval.
7. One or more computer-readable media containing executable instructions that, when executed, perform a process comprising:
inserting a stimulus delay between receipt of a stimulus from a virtual reality environment and input of the stimulus to an artificial intelligence motion control system to produce a delayed stimulus, the stimulus delay being at least one simulation interval;
generating a control signal to control motion of an artificial intelligence controlled player based on the delayed; and
wherein a length of the stimulus delay is changeable from a first game session to a second game session in the virtual reality environment.
8. The one or more computer-readable media of claim 7 wherein the length of the stimulus delay is changeable between different simulation intervals.
9. The one or more computer-readable media of claim 7 wherein the length of the stimulus delay for a given stimulus is different for different artificial intelligence controlled players in the virtual reality environment.
10. The one or more computer-readable media of claim 7 wherein the inserting operation comprises:
receiving the stimulus into a stimuli buffer to delay input of the stimulus to the artificial intelligence motion control system.
11. The one or more computer-readable media of claim 7 wherein the stimulus is of a first type of stimulus, the stimulus delay is a first stimulus delay, and the computer process further comprises:
inserting a second stimulus delay between receipt of a second type of stimulus from the virtual reality environment and input of the second type of stimulus to the artificial intelligence motion control system, the second stimulus delay being greater than the first stimulus delay.
12. The one or more computer-readable media of claim 7 wherein the generating operation comprises:
generating a control signal for a current simulation interval using stimulus from a previous simulation interval.
13. A method comprising:
inserting a control delay between receipt of a control signal from an artificial intelligence motion control system for a virtual reality environment and input of the control signal to a physics engine to produce a delayed control signal, the control delay having a length of at least one simulation interval;
inputting the delayed control signal into the physics engine to control motion of an artificial intelligence controlled player in the virtual reality environment; and
simulating motion of the artificial intelligence controlled player in a current simulation interval based on the delayed control signal associated with a previous simulation interval.
14. The method of claim 13 wherein the length of the control delay changes between different game sessions in the virtual reality environment.
15. The method of claim 13 wherein the length of the control delay changes between different simulation intervals.
16. The method of claim 13 wherein the length of the control delay for a given control signal is different for different artificial intelligence controlled players in the virtual reality environment.
17. The method of claim 13 wherein the inserting operation comprises:
receiving the control signal into a control buffer to delay input of the control signal to the physics engine.
18. The method of claim 13 wherein the control signal is of a first control type, the control delay is a first control delay, and further comprising:
inserting a second control delay between receipt of a second type of control signal from the artificial intelligence motion control system and input of the second type of control signal to the physics engine, the second control delay being greater than the first control delay.
19. One or more computer-readable media containing executable instructions that, when executed, perform a process comprising:
inserting a control delay between receipt of a control signal from an artificial intelligence motion control system for a virtual reality environment and input of the control signal to a physics engine to produce a delayed control signal, the control delay having a length of at least one simulation interval;
inputting the delayed control signal into the physics engine to control motion of an artificial intelligence controlled player in the virtual reality; and
simulating motion of the artificial intelligence controlled player in a current simulation interval based on the delayed control signal.
20. The one or more computer-readable media of claim 19 wherein the computer process further comprises:
simulating motion of an artificial intelligence controlled player in a current simulation interval based on the delayed control signal.
21. The one or more computer-readable media of claim 19 wherein the length of the control delay changes between different game sessions in the virtual reality environment.
22. The one or more computer-readable media of claim 19 wherein the length of the control delay changes between different simulation intervals.
23. The one or more computer-readable media of claim 19 wherein the length of the control delay for a given control signal is different for different artificial intelligence controlled players in the virtual reality environment.
24. The one or more computer-readable media of claim 19 wherein the inserting operation comprises:
receiving the control signal into a control buffer to delay input of the control signal to the physics engine.
25. The one or more computer-readable media of claim 19 wherein the control signal is of a first control type, the control delay is a first control delay, and the computer process further comprises:
inserting a second control delay between receipt of a second type of control signal from the artificial intelligence motion control system and input of the second type of control signal to the physics engine, the second control delay being greater than the first control delay.