What is claimed is:
1. A semiconductor device comprising:
a circuit area defined in a semiconductor substrate;
a semiconductor element formed in the circuit area;
an interlevel insulating film having a hole reached the semiconductor element and a ring-shaped groove seamlessly surrounding an outer periphery of the circuit area;
a via plug formed in the hole in the interlevel insulating film;
a wiring connected to the via plug and mainly comprising copper; and
a via ring formed in the ring-shaped groove and mainly comprising aluminum, wherein:
no layer mainly comprising copper is formed in the via ring layer.
2. A semiconductor device according to claim 1, wherein the via plug is configured in the same manner as the via ring.
3. A method for manufacturing a semiconductor device, comprising the steps of:
depositing a thin Al film on a semiconductor substrate having a semiconductor element formed in a circuit area, the thin Al film mainly comprising aluminum;
patterning the thin Al film to form via plug reached the semiconductor and forming a via ring surrounding the circuit area;
depositing an insulating film on the semiconductor substrate in such a manner as to cover the via plugs and the via ring;
flattening a surface of the insulating film; and
forming a wiring mainly comprising copper and which is connected to the via plugs.
4. A method for manufacturing a semiconductor device according to claim 3, wherein the step of forming the wiring mainly comprising copper includes the steps of:
forming a resist pattern having a wiring area exposed from the insulating film in the circuit area, the resist pattern covering the insulating film in an area with the via ring formed therein;
etching the insulating film to form in the semiconductor element circuit a groove shaped in a wiring pattern; and
embedding and forming in the groove a wiring material mainly comprising copper.
5. A method for manufacturing a semiconductor device according to claim 4, wherein before the embedding and formation of the wiring material, a barrier metal is formed on a surface of the wiring-patterned groove for restraining copper diffusion.
6. A method for manufacturing a semiconductor device, comprising the steps of:
depositing a thin Al film on a semiconductor substrate having a semiconductor element formed in a circuit area, the thin Al film mainly comprising aluminum;
depositing a silicon nitride film on the thin Al film;
patterning the silicon nitride film to shape a plug pattern in the circuit area and a ring seamlessly surrounding an outer periphery of the circuit area;
using the silicon nitride film as a mask to etch the thin film in order to form via plugs in the circuit area while forming a via ring surrounding the circuit area;
depositing an insulating film on the semiconductor substrate in such a manner as to cover the via plugs and the via ring;
using the silicon nitride film as a stopper to flatten a surface of the insulating film;
forming a resist pattern having a wiring area exposed from the insulating film in the circuit area, the resist pattern covering the insulating film in an area with the via ring formed therein as well as the silicon nitride film;
etching the insulating film and the silicon nitride film to form in the semiconductor element circuit a groove shaped in a wiring pattern; and
embedding and forming in the groove a wiring material mainly comprising copper.
7. A method for manufacturing a semiconductor device according to claim 6, wherein before the embedding and formation of the wiring material, a barrier metal is formed on surfaces of the via holes and wiring groove for restraining copper diffusion.
8. A method for manufacturing a semiconductor device according to claim 6, wherein the silicon nitride film is formed to be substantially as thick as the wiring.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
What is claimed is:
1. A FOUP opener for opening and closing a FOUP door which closes a front opening portion of a FOUP containing a plurality of semiconductor wafers oriented horizontally and arranged in layers at predetermined intervals, said FOUP opener comprising:
a dock plate for carrying and positioning said FOUP;
a dock moving mechanism for moving said dock plate to a position for detachment and attachment of said FOUP door;
a port door including a detachmentattachment mechanism for detaching and attaching said FOUP door and a holder mechanism for holding said FOUP door;
a port plate including an opening portion, the opening portion being closed by said port door;
a port door horizontal-movement mechanism for horizontally moving said port door; and
a port door vertical-movement mechanism for vertically moving said port door with said port door holding said FOUP door, so as to house said FOUP door, wherein
said port door includes sealing means for sealing a space defined between an outside wall of said FOUP door and an outside wall of said port door.
2. A FOUP opener as described in claim 1, wherein said sealing means assumes the form of a protrusion provided along an outer circumferential edge of said port door in such a manner as to project toward said FOUP door and to abut said FOUP door along an entire circumference of said FOUP door.
3. A FOUP opener as described in claim 2, wherein said sealing means comprises a packing member.
4. A FOUP opener as described in any one of claims 1 to 3, further comprising evacuation means for evacuating a contaminated atmosphere from a sealed space defined between the outside wall of said FOUP door and an outside wall of said port door.