1. A process for the manipulation of microparticles, said process comprising:
generating an illumination pattern on a planar surface of a silicon electrode in contact with an electrolyte solution, in which microparticles are suspended; and
applying an AC field to said silicon electrode, whereby said microparticles are transported into or out of illuminated areas within the illumination pattern.
2. The process of claim 1, wherein the illumination pattern is generated using a graphical user environment.
3. The process of claim 1, wherein said generating step is performed by imaging said illumination pattern using a liquid crystal display panel.
4. The process of claim 1, wherein the illumination pattern is generated by a generator which includes an active mask which is configured by means of a video adapter interfaced with an active mask control circuit.
5. The process of claim 1, wherein active feedback is used to programmably reconfigure an array of microparticles assembled on the electrode.
6. The process of claim 1, wherein said microparticles are segmented into at least two subarrays.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
What is claimed is:
1. A timing recovery control signal generated in a timing recovery loop based upon an equalized feedback signal.
2. A timing recovery loop in the front end of a digital receiver, comprising:
a sample rate converter which receives a symbol stream at a first sampling rate and outputs the symbol stream at a second sampling rate responsive to a timing recovery (TR) control signal;
a forward equalizer generating an equalized feedback signal based on the symbol stream at the second sampling rate; and
a timing recovery circuit generating the TR control signal based upon the equalized feedback signal.
3. The timing recovery loop as recited in claim 2, further comprising a carrier recovery circuit electrically coupling the sample rate converter to the forward equalizer.
4. The timing recovery loop as recited in claim 3, further comprising a finite impulse response (FIR) filter electrically coupling the carrier recovery circuit to the forward equalizer.
5. The timing recovery loop as recited in claim 4, wherein the FIR filter is a square-root raised cosine filter.
6. A digital receiver connected to N antennae including N timing recovery loops electrically coupled to the N antennae, each of the N timing recovery loops constructed as recited in claim 2.
7. A timing recovery loop in the front end of a digital receiver including N antennae, comprising:
N sample rate converters which receive an Nth symbol stream at a first sampling rate from an Nth antenna and outputs the Nth symbol stream at a second sampling rate responsive to a timing recovery (TR) control signal;
N forward equalizers generating an Nth equalized feedback signal based on the Nth symbol stream at the second sampling rate, respectively; and
a timing recovery circuit generating the TR control signal based upon the N equalized feedback signals.
8. The timing recovery loop as recited in claim 7, further comprising N carrier recovery circuits, each electrically coupling an Nth one of the N sample rate converters to an Nth one of the forward equalizers.
9. The timing recovery loop as recited in claim 8, further comprising N finite impulse response (FIR) filters, each electrically coupling an Nth one of the carrier recovery circuits to an Nth one of the forward equalizers.
10. The timing recovery loop as recited in claim 9, wherein each of the N FIR filters is a square-root raised cosine filter.
11. A timing recovery loop in the front end of a digital receiver including N antennae, comprising:
N sample rate converters, each receiving an Nth symbol stream at a first sampling rate from an Nth antenna and outputting the Nth symbol stream at a second sampling rate responsive to a timing recovery (TR) control signal;
N forward equalizers, each generating an Nth equalized feedback signal based on the Nth symbol stream at the second sampling rate, respectively; and
a timing recovery circuit generating the TR control signal based upon a selected one of the N equalized feedback signals.
12. The timing recovery loop as recited in claim 11, further comprising N carrier recovery circuits, each electrically coupling an Nth one of the N sample rate converters to an Nth one of the forward equalizers.
13. The timing recovery loop as recited in claim 12, further comprising N finite impulse response (FIR) filters, each electrically coupling an Nth one of the carrier recovery circuits to an Nth one of the forward equalizers.
14. The timing recovery loop as recited in claim 13, wherein each of the N FIR filters is a square-root raised cosine filter.
15. The timing recovery loop as recited in claim 11, further comprising a selector receiving N signals based on the N equalized feedback signals at N respective input terminals and applying the selected one of the N signals to the timing recovery circuit.
16. A method for operating a digital receiver including a sample rate converter responsive to a timing recovery (TR) control signal, comprising:
generating an equalized feedback signal based on a symbol stream having a controlled sample rate;
producing the TR control signal based on the equalized feedback signal; and
applying the TR control signal to the sample rate converter to thereby permit the sample rate converter to output the symbol stream at the controlled sample rate.
17. A method for operating a digital receiver, including N sample rate converters responsive to a timing recovery (TR) control signal, connected to N antennae, respectively, comprising:
generating N equalized feedback signals, each based on an Nth symbol stream having a controlled sample rate;
combining the N equalized feedback signal to produce a combined equalized feedback signal;
producing the TR control signal based on the combined equalized feedback signal; and
applying the TR control signal to the sample rate converter to thereby permit the N sample rate converters to output N symbol streams at the controlled sample rate.
18. A method for operating a digital receiver, including N sample rate converters responsive to a timing recovery (TR) control signal, connected to N antennae, respectively, comprising:
generating N equalized feedback signals, each based on an Nth symbol stream having a controlled sample rate;
selecting one of the N equalized feedback signals to produce a selected equalized feedback signal;
producing the TR control signal based on the selected equalized feedback signal; and
applying the TR control signal to the sample rate converter to thereby permit the N sample rate converters to output N symbol streams at the controlled sample rate.