1. A mobile terminal comprising:
an antenna which transmits and receives a mobile communication radio signal;
a radio frequency identification (RFID) module for processing the RFID radio signals from external RFID devices;
an RFID matching circuit connected to the RFID module which changes an operating band of the antenna to a frequency band where an RFID radio signal is input and output;
a communication module which processes the mobile communication radio signal transmitted and received via the antenna; and
a switch which connects the antenna to either the communication module or the RFID matching circuit according to whether an RFID function is used or not.
2. The mobile terminal as in claim 1, further comprising:
a communication matching circuit which matches the operating band of the antenna to a frequency band of the mobile communication radio signal.
3. The mobile terminal as in claim 2, wherein the communication matching circuit is connected with the RFID matching circuit in parallel.
4. The mobile terminal as in claim 2, wherein the switch selectively connects the antenna with either the communication matching circuit or the RFID matching circuit.
5. The mobile terminal as in claim 4, wherein, when the switch is switched to connect the antenna and the RFID matching circuit, the operating band of the antenna is matched to the frequency band of the RFID radio signal.
6. The mobile terminal as in claim 2, wherein, when the switch is switched to connect the antenna and the communication matching circuit, the operating band of the antenna is matched to the frequency band of the mobile communication radio signal.
7. The mobile terminal as in claim 2, wherein the RFID matching circuit is connected to an end of the communication matching circuit which directs the communication module, in parallel.
8. The mobile terminal as in claim 7, wherein the switch connects the communication matching circuit to either the communication module or the RFID matching circuit.
9. The mobile terminal as in claim 8, wherein, when the switch is switched to connect the communication matching circuit and the RFID matching circuit, the operating band of the antenna is matched to the frequency band of the RFID radio signal.
10. The mobile terminal as in claim 8, wherein, when the switch is switched to connect the communication matching circuit and the communication module, the operating band of the antenna is matched to the frequency band of the mobile communication radio signal.
11. The mobile terminal as in claim 1, wherein the RFID matching circuit comprises:
a first capacitor connected to the switch in series; and
a second capacitor connected to the first capacitor.
12. The mobile terminal as in claim 2, wherein the communication matching circuit comprises:
a first inductor connected to the switch in series; and
a first capacitor connected to the first inductor.
13. The mobile terminal as in claim 2, wherein the RFID matching circuit is a circuit to match operating frequency of the antenna.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A signal processing apparatus comprising:
a microprocessor;
memory control means for writing data in a memory device; and
memory access means for transferring the data to said memory control means in accordance with an instruction from said microprocessor,
wherein in writing the data having a first size in the memory device, said memory access means transfers the data to said memory control means until the write of the data having the first size is ended, and said memory control means checks that a state of the memory device is a predetermined state every time the write of the data having a second size smaller than the first size in the memory device is ended, and outputs an interrupt request signal to said microprocessor in accordance with an end of the write of the data having the first size in the memory device.
2. The apparatus according to claim 1, wherein when the state of the recording medium is not the predetermined state, said memory control means stops writing the data in the recording medium.
3. The apparatus according to claim 1, wherein said memory control means has comparison means for comparing status data read out from the recording medium with a preset comparison value and checks the state of the memory device on the basis of an output from said comparison means.
4. The apparatus according to claim 3, wherein said memory device outputs an interrupt request every time the data having the second size is written, and said memory control means reads out the status data from the memory device in accordance with generation of the interrupt request by the memory device.
5. The apparatus according to claim 4, wherein said memory control means reads out the status data from the memory device in accordance with an instruction of a write start of the data having the first size.
6. The apparatus according to claim 1 further comprises state control means for controlling whether transfer of the data by said memory access means is to be executed.
7. The apparatus according to claim 6, wherein the data contains image data, and said state control means controls in accordance with an operation state of image sensing means for outputting the image data whether transfer of the data by said memory access means is to be executed.
8. The apparatus according to claim 7, wherein the state control means stops transfer of the data by said memory access means during a predetermined period synchronized with a vertical sync period of the image data.
9. The apparatus according to claim 1, wherein the second size is decided in accordance with the memory device.
10. A signal processing apparatus comprising:
a microprocessor;
memory control means for reading out data from a memory device; and
memory access means for transferring the data read out by said memory control means in accordance with an instruction from said microprocessor,
wherein in reading out the data having a first size from the memory device, said memory access means transfers the data read out from said memory control means until the read of the data having the first size is ended, and said memory control means checks that a state of the memory device is a predetermined state every time the read of the data having a second size smaller than the first size from the memory device is ended, and outputs an interrupt request signal to said microprocessor in accordance with an end of the read of the data having the first size from the memory device.