1. A method for correcting the phase difference between a pixel clock of a graphics card and a sampling clock of a flat-panel display with an analog interface in a system having a flat-panel display, a graphics card and a computer, comprising:
determining an ideal phase difference between the pixel clock of the graphics card and the sampling clock of the flat panel display; and
performing an automatic adjustment of the ideal phase difference repeatedly during continued operation of the display to compensate for phase drift during the continued operation of the display by providing an updated ideal phase difference;
wherein an ideal phase difference adjustment necessary for an instantaneous condition of the system during continued operation of the display is determined only at individual image spots, and the determined ideal phase difference adjustment is then applied to the entire display as the display displays images;
wherein said automatic adjustment of the ideal phase difference comprises selecting a sufficiently bright image spot and the rising edge of a video pulse of this image spot is determined, and the ideal phase difference is adjusted such that a sampling instant for an entire image is situated approximately at the midpoint between rising and falling edges of the video pulse.
2. The method according to claim 1, wherein the automatic adjustment of the ideal phase difference is performed continuously.
3. The method according to claim 1, wherein the automatic adjustment of the ideal phase difference is performed periodically.
4. The method according to claim 1, wherein said automatic adjustment of the ideal phase difference comprises determining a falling edge of a video pulse at a sufficiently bright image spot, and the ideal phase difference is adjusted such that a sampling instant is shifted by approximately half the width of an image spot toward the center of a pixel.
5. The method according to claim 1, wherein an image area and image spots are arrayed on the flat-panel display in rows and columns between a back-porch region and a front-porch region, wherein said automatic adjustment of the ideal phase difference comprises choosing an image spot in a first image column close to the back-porch region as the sufficiently bright image spot for determination of the rising edge and an image spot in the first image column close to the front-porch region is chosen as the sufficiently bright image spot for determination of the falling edge.
6. The method according to claim 1, wherein said automatic adjustment of the ideal phase difference further comprises measuring the brightness of a plurality of image spots of the first or last image column and choosing the image spots with the greatest brightness in the first or last image column for determination of the rising or falling edge respectively of the video pulse.
7. The method according to claim 1, wherein said automatic adjustment of the ideal phase difference further comprises measuring image spots (n\xd7k) are with n=1,2, . . . N and k=constant, and, if no sufficiently bright image spot is found, the image spots (n+m)\xd7k are measured with m=1, 2, . . . N, until a sufficiently bright image spot is found.
8. The method according to claim 1, wherein said automatic adjustment of the ideal phase difference further comprises for determination of the amplitude values of the selected image spots, shifting the phases at these image spots until the measured amplitude values no longer change significantly, and further processing the amplitude values determined.
9. The method according to claim 1, wherein said automatic adjustment of the ideal phase difference further comprises advancing the phase used for determination of amplitude values sufficiently so that measured amplitude values are smaller than a predetermined limit value delaying the phase by half the width of a spot, and further processing the measured amplitude value.
10. The method according to claim 1, wherein said automatic adjustment of the ideal phase difference further comprises determining the rising edge of the selected image spots, shifting the phase at the selected image spot sufficiently toward the back-porch region so that a measured amplitude value is reduced to a predetermined percentage-of a previously determined amplitude value, and storing this value of the phase temporarily as the position of the rising edge.
11. A method according to claim 1, wherein said automatic adjustment of the ideal phase difference further comprises determining the falling edge of the selected image spots, shifting the phase at the selected image spot sufficiently toward the front-porch region so that a measured amplitude value is reduced to a predetermined percentage a previously determined amplitude value, and storing this value of the phase temporarily as the position of the falling edge.
12. A method according to claim 1, further comprising delaying the phase or sampling instant relative to the midpoint between the rising and falling edges by a predetermined amount.
13. The method according to claim 12, further comprising repeatedly regenerating a video memory.
14. A method according to claim 1, further comprising masking pixel or pixels that is or are influenced or distorted during determining the ideal phase difference by masking such pixel or pixels with distortion-free image fragments from a video memory.
15. The method according to claim 1, further comprising creating an offset wherein the sampling instant can be changed by a user compared with the value determined during determining the ideal phase difference in which case said offset is used during an automatic matching.
16. The method according to claim 1, wherein when performing an automatic adjustment of the ideal phase difference, the adjusted ideal phase difference may be unchanged from the immediately preceding one.
17. A device for correcting the phase difference between the pixel clock of a graphics card and the sampling clock of a flat-panel display with an analog interface in a system having a flat-panel display, a graphics card and a computer, comprising:
a processor for repeatedly determining an ideal phase difference between a pixel clock of a graphics card and a sampling clock of a flat panel display; and
an adjusting circuit which repeatedly performs an automatic adjustment of the ideal phase difference during the continued operation of the display to compensate for phase drift during the continued operation of the display and to provide an updated ideal phase difference;
wherein the adjusting circuit determines the rising edge of a video pulse of a sufficiently bright image spot, determines the falling edge of the video pulse at a sufficiently bright image spot, and the phase is adjusted such that the sampling instant is located at approximately the midpoint between the rising and the falling edges of a video pulse.
18. The device according to claim 17, wherein the automatic adjustment of the ideal phase difference is performed continuously or periodically.
19. The device according to claim 17, wherein the adjusting circuit for adjusting the phase further comprises a circuit containing two PLL circuits, with outputs which can be adjusted independently of one another as regards their phase.
20. The device according to claim 17, wherein the adjusting circuit for shifting the phase further comprises a PLL circuit with two clock outputs with output clock signals which can be adjusted independently of one another as regards their phase.
21. The device according to claim 20, wherein the two outputs of the PLL circuit deliver a sampling clock signal for matching and a sampling signal for the entire image.
22. The device according to claim 21, wherein the sampling clock is delivered alternately by the two outputs of the PLL circuit.
23. The device according to claim 17, wherein the adjusting circuit is structured to make a phase adjustment necessary for the instantaneous condition of the system which is determined only at individual image spots, and by which the determined phase adjustment is then applied to the entire image.
24. The device according to claim 17, wherein a PLL circuit which is programmed such that it oscillates at an integral multiple of the needed sampling frequency, and by a downstream frequency divider, which divides the sampling frequency of the PLL circuit by a factor n, wherein n sampling signals phase-shifted by In periods relative to one another can be generated.
25. The device according to claim 24, wherein a factor n=2 is used and wherein the phase difference of the PLL circuit is adjusted such that one sampling signal is in phase with one edge of the pixel, and the other sampling signal is shifted by \xbd pixel in its phase difference.
26. A device for correcting the phase difference between the pixel clock of a graphics card and the sampling clock of a flat-panel display with an analog interface in a system having a flat-panel display, a graphics card and a computer, comprising:
a processor for repeatedly determining an ideal phase difference between a pixel clock of a graphics card and a sampling clock of a flat panel display; and
an adjusting circuit which repeatedly performs an automatic adjustment of the ideal phase difference during the continued operation of the display to compensate for phase drift during the continued operation of the display and to provide an updated ideal phase difference;
wherein the adjusting circuit determines the rising edge of a video pulse of a sufficiently bright image spot, and the phase is adjusted such that the sampling instant is shifted by approximately half the width of an image spot toward the center of the pixel.
27. A device for correcting the phase difference between the pixel clock of a graphics card and the sampling clock of a flat-panel display with an analog interface in a system having a flat-panel display, a graphics card and a computer, comprising:
a processor for repeatedly determining an ideal phase difference between a pixel clock of a graphics card and a sampling clock of a flat panel display; and
an adjusting circuit which repeatedly performs an automatic adjustment of the ideal phase difference during the continued operation of the display to compensate for phase drift during the continued operation of the display and to provide an updated ideal phase difference;
wherein the adjusting circuit determines the falling edge of a video pulse at a sufficiently bright image spot, and the phase is adjusted such that the sampling instant is shifted by approximately half the width of an image spot toward the center of the pixel.
28. A device for correcting the phase difference between the pixel clock of a graphics card and the sampling clock of a flat-panel display with an analog interface in a system having a flat-panel display, a graphics card and a computer, comprising:
a processor for repeatedly determining an ideal phase difference between a pixel clock of a graphics card and a sampling clock of a flat panel display; and
an adjusting circuit which repeatedly performs an automatic adjustment of the ideal phase difference during the continued operation of the display to compensate for phase drift during the continued operation of the display and to provide an updated ideal phase difference;
wherein the adjusting circuit for shifting the phase for determination of the sampling value of the image spot until the measured amplitude values no longer differ significantly, whereupon the sampling value determined then is further processed.
29. A device for correcting the phase difference between the pixel clock of a graphics card and the sampling clock of a flat-panel display with an analog interface in a system having a flat-panel display, a graphics card and a computer, comprising:
a processor for repeatedly determining an ideal phase difference between a pixel clock of a graphics card and a sampling clock of a flat panel display; and
an adjusting circuit which repeatedly performs an automatic adjustment of the ideal phase difference during the continued operation of the display to compensate for phase drift during the continued operation of the display and to provide an updated ideal phase difference;
wherein the adjusting circuit advances the phase used for determination of the sampling value sufficiently that the measured amplitude values are smaller than a predetermined limit value, such as smaller than 50% of the sampling value, and by a device which then retards the phase by half the width of an image spot, whereupon the sampling value measured then is further processed.
30. A device for correcting the phase difference between the pixel clock of a graphics card and the sampling clock of a flat-panel display with an analog interface in a system having a flat-panel display, a graphics card and a computer, comprising:
a processor for repeatedly determining an ideal phase difference between a pixel clock of a graphics card and a sampling clock of a flat panel display; and
an adjusting circuit which repeatedly performs an automatic adjustment of the ideal phase difference during the continued operation of the display to compensate for phase drift during the continued operation of the display and to provide an updated ideal phase difference;
wherein the adjusting circuit shifts the phase for determination of the rising edge sufficiently far toward a back-porch region that the measured amplitude value decreases to a predetermined percentage, such as 50% of the previously determined amplitude value, whereupon this value of the phase is stored temporarily as the position of the rising edge.
31. A device for correcting the phase difference between the pixel clock of a graphics card and the sampling clock of a flat-panel display with an analog interface in a system having a flat-panel display, a graphics card and a computer, comprising:
a processor for repeatedly determining an ideal phase difference between a pixel clock of a graphics card and a sampling clock of a flat panel display; and
an adjusting circuit which repeatedly performs an automatic adjustment of the ideal phase difference during the continued operation of the display to compensate for phase drift during the continued operation of the display and to provide an updated ideal phase difference;
wherein a device which shifts the phase for determination of the falling edge sufficiently far toward the front-porch region that the measured amplitude value decreases to a predetermined percentage whereupon this value of the phase is stored temporarily as the position of the falling edge.
32. A device for correcting the phase difference between the pixel clock of a graphics card and the sampling clock of a flat-panel display with an analog interface in a system having a flat-panel display, a graphics card and a computer, comprising:
a processor for repeatedly determining an ideal phase difference between a pixel clock of a graphics card and a sampling clock of a flat panel display; and
an adjusting circuit which repeatedly performs an automatic adjustment of the ideal phase difference during the continued operation of the display to compensate for phase drift during the continued operation of the display and to provide an updated ideal phase difference;
wherein the adjusting circuit uses an offset by which the sampling instant can be changed by the user compared with the value determined during matching, in which case said offset is used during automatic matching.
33. A method for correcting the phase difference between a pixel clock of a graphics card and a sampling clock of a flat-panel display with an analog interface in a system having a flat-panel display, a graphics card and a computer, comprising:
determining an ideal phase difference between the pixel clock of the graphics card and the sampling clock of the flat panel display;
performing an automatic adjustment of the ideal phase difference repeatedly during continued operation of the display to compensate for phase drift during the continued operation of the display by providing an updated ideal phase difference based on which a sampling instant for the entire image is situated approximately at a midpoint between the rising and falling edges of a video pulse.
34. A method for correcting the phase difference between a pixel clock of a graphics card and a sampling clock of a flat-panel display with an analog interface in a system having a flat-panel display, a graphics card and a computer, comprising:
determining an ideal phase difference between the pixel clock of the graphics card and the sampling clock of the flat panel display;
performing an automatic adjustment of the ideal phase difference repeatedly during continued operation of the display to compensate for phase drift during the continued operation of the display by providing an updated ideal phase difference;
wherein the ideal phase difference adjustment necessary for an instantaneous condition of the system during continued operation of the display is determined only at individual image spots, and the determined ideal phase difference adjustment is then applied to the entire display as the display displays images; and
wherein the updated ideal phase difference is such that a sampling instant for the entire image is situated approximately at a midpoint between the rising and falling edges of a video pulse.
35. A method for correcting the phase difference between a pixel clock of a graphics card and a sampling clock of a flat-panel display with an analog interface in a system having a flat-panel display, a graphics card and a computer, comprising:
determining an ideal phase difference between the pixel clock of the graphics card and the sampling clock of the flat panel display; and
performing an automatic adjustment of the ideal phase difference repeatedly during continued operation of the display to compensate for phase drift during the continued operation of the display by providing an updated ideal phase difference;
wherein an ideal phase difference adjustment necessary for an instantaneous condition of the system during continued operation of the display is determined only at individual image spots, and the determined ideal phase difference adjustment is then applied to the entire display as the display displays images;
wherein said automatic adjustment of the phase difference comprises determining a rising edge of a video pulse of a sufficiently bright image spot and the ideal phase difference is adjusted such that a sampling instant is shifted by approximately half the width of an image spot toward the center of a pixel.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1-23. (canceled)
24. A method of forming an integrated circuit package, comprising:
forming adhesion layers over bond pad regions of a semiconductor die;
forming electrically conductive inner layers over the adhesion layers, the electrically conductive inner layers comprising one or more of B, Co, Cr, Ni, P, Pt, Ta, Ti, V and W;
forming electrically conductive outer layers over the inner layers;
directly contacting the electrically conductive outer layers with electrically conductive structures;
directly contacting the electrically conductive structures with electrically conductive surfaces of a piece separate from the die; and
utilizing vibrational energy with a frequency of at least about one kilohertz to bond the electrically conductive outer layers to the electrically conductive structures; and
utilizing vibrational energy with a frequency of at least about one kilohertz to bond the electrically conductive surfaces to the electrically conductive structures.
25. The method of claim 24 wherein the electrically conductive structures are balls.
26. The method of claim 25 wherein the balls comprise copper.
27. The method of claim 25 wherein the balls comprise gold.
28. The method of claim 24 wherein the electrically conductive outer layers comprise one or more of Ag, Au, Cu and Pd.
29. The method of claim 28 wherein the electrically conductive surfaces comprise one or more of Ag, Au, Cu and Pd.
30. The method of claim 28 wherein the adhesion layers are palladium-containing layers.
31. The method of claim 28 wherein the adhesion layers are zinc-containing layers.
32. The method of claim 31 wherein the forming of the zinc-containing layers comprises:
first zincate activation of surfaces of the bond pad regions to form a first zinc-containing material;
removal of the first zinc-containing material; and
second zincate activation of surfaces of the bond pad regions to form a second zinc-containing material.
33. The method of claim 31 wherein the bond pad regions comprise aluminum or copper, and wherein the zinc-containing layers are formed directly against the aluminum or copper of the bond pad regions.
34. A method of forming an integrated circuit package, comprising:
forming zinc-containing layers over bond pad regions of a semiconductor die;
forming nickel-containing layers over the zinc-containing layers;
forming gold-containing layers over the nickel-containing layers;
directly contacting the gold-containing layers with gold-containing surfaces of one or more pieces separate from the die; and
utilizing vibrational energy with a frequency of at least about one kilohertz to bond the gold-containing layers to the gold-containing surfaces.
35. The method of claim 34 wherein the gold-containing surfaces are surfaces of gold-containing balls.
36. The method of claim 35 further comprising bonding the gold-containing balls to gold-containing projections of an interposer.
37. The method of claim 34 wherein the bond pad regions comprise aluminum or copper, and wherein the zinc-containing layers are formed directly against the aluminum or copper of the bond pad regions.
38. The method of claim 34 wherein the frequency of the vibrational energy is less than or equal to 240 kilohertz.
39-47. (canceled)
48. The method of claim 24 further comprising pressing the electrically conductive surfaces through z-axis conductive material during the direct contacting of the electrically conductive surfaces with electrically conductive structures.
49. The method of claim 48 wherein the z-axis conductive material is initially in a non-conductive form, and wherein a portion of the z-axis conductive material is compressed during the direct contacting of the electrically conductive surfaces with electrically conductive structures to thereby be transformed to a conductive form.
50. The method of claim 49 wherein the electrically conductive structures are spheres.