1. A method for preparing rutile TiO2 nanoparticles which are aggregates of elongated TiO2 crystallites comprising:
(a) forming an aqueous solution of a soluble titanium compound at a titanium concentration of from 0.5 to 1.0 moles per liter, optionally in the presence of a mineral acid;
(b) introducing a morphology controlling agent or a mixture thereof selected from (i) an \u03b1-hydroxy carboxylic acid of the formula R\u2014CH(OH)COOH, (ii) an \u03b1-hydroxy carboxamide of the formula R\u2014CH(OH)CONH2 or (iii) an \u03b1-amino acid of the formula R\u2014CH(NH2)COOH, wherein R is an alkane, alkene, alkyne, arene, or cycloalkane group having 6 or more carbon atoms, into the solution at an acid- or carboxamide-to-titanium molar ratio of from 0.02 to 0.2 while simultaneously heating the solution to a temperature in the range of from 60\xb0 C. to 80\xb0 C. with constant stirring;
(d) introducing TiO2 seeds into the stirred solution at a seed-to-TiO2 molar ratio of from 0.0005 to 0.0015 and maintaining the stirred solution at a temperature in the range of from 60\xb0 C. to 80\xb0 C. for a period of from one to 3 hours;
(e) elevating the temperature of the stirred solution to a value of from 100\xb0 C. to the refluxing temperature and maintaining said temperature for a period of from 2 hours to 4 hours to form a reaction product;
(f) cooling the reaction mixture which results from step (e) to room or ambient temperature;
(g) optionally neutralizing the reaction mixture; and
(h) separating and drying the reaction product.
2. The method of claim 1 wherein said elongated TiO2 crystallites have a thickness of from 3 nm to 5 nm and a length of from 20 nm to 50 nm.
3. The method of claim 2 wherein said rutile TiO2 nanoparticles are aggregates wherein one set of ends of said elongated TiO2 crystallites of each aggregate are joined in a cluster and the opposite ends of said crystallites fan outwardly in the general shape of a funnel having a diameter in the range of 50 nm and a height in the range of from 50 nm to 100 nm.
4. The method of claim 1 wherein said morphology controlling agent is selected from mandelic acid (C6H5CH(OH)COOH); 4-hydroxymandelic acid (C6H4(OH)CH(OH)COOH); benzilic acid ((C6H5)2C(OH)COOH); 2-hydroxy-4-phenylbutyric acid (C6H5CH2CH2CH(OH)COOH); 2-hydroxy-2-phenylpropionic acid ((C6H5)(CH3)C(OH)COOH); 2-hydroxyoctanoic acid (CH3CH2CH2CH2CH2CH2CH(OH)COOH); mandelamide (C6H5CH(OH)CONH2); phenylalanine (C6H5CH2CH(NH2)COOH); tyrosine (C6H4(OH)CH2CH(NH2)COOH); and ammonium (NH4+), sodium (Na+) and potassium (K+) salts thereof and mixtures thereof.
5. The method of claim 1 wherein said soluble titanium compound is selected from titanium oxychloride (TiOCl2), titanium oxybromide (TiOBr2), titanium oxyiodide (TiOl2), titanium oxynitrate (TiO(NO3)2), titanium trichloride (TiCl3), titanium tribromide(TiBr3), titanium oxalate (Ti2(C2O4)3), potassium hexafluorotitanate(K2TiF6), ammonium hexafluorotitanate ((NH4)2TiF6), potassium titanyloxolate (K2TiO(C2O4)2), ammonium titanyloxolate ((NH4)2TiO(C2O4)2), titanium bis(ammonium lactate) dihydroxide (CH3CH(O)COONH42Ti(OH)2) and mixtures thereof.
6. The method of claim 4 wherein said soluble titanium compound is selected from titanium oxychloride (TiOCl2), titanium oxybromide (TiOBr2), titanium oxyiodide (TiOl2), titanium oxynitrate (TiO(NO3)2), titanium trichloride (TiCl3), titanium tribromide(TiBr3), titanium oxalate (Ti2(C2O4)3), potassium hexafluorotitanate(K2TiF6), ammonium hexafluorotitanate ((NH4)2TiF6), potassium titanyloxolate (K2TiO(C2O4)2), ammonium titanyloxolate ((NH4)2TiO(C2O4)2), titanium bis(ammonium lactate) dihydroxide (CH3CH(O)COONH42Ti(OH)2) and mixtures thereof.
7. The method of claim 6 wherein said morphology controlling agent is mandelic acid (C6H5CH(OH)COOH), said soluble titanium compound is titanium oxychloride (TiOCl2), and said TiO2 seeds comprise a slurry containing 0.2 g TiO2 in anatase phase.
8. The method of claim 7 wherein said morphology controlling agent is phenylalanine (C6H5CH2CH(NH2)COOH).
9. Rutile TiO2 nanoparticles which are ordered acicular aggregates of elongated TiO2 crystallites having a thickness in the range of from 3 nm to 5 nm in which one end of each of said elongated TiO2 crystallites are joined into a cluster such that the opposite ends of each of said elongated TiO2 crystallites extend outwardly in the shape of a nano-sized funnel structure having a diameter in the range of 50 nm and a height in the range of from 50 nm to 100 nm.
10. The rutile TiO2 nanoparticles of claim 9 which are produced by the process of:
(a) forming an aqueous solution of a soluble titanium compound at a titanium concentration of from 0.5 to 1.0 moles per liter;
(b) introducing a morphology controlling agent or a mixture thereof selected from (i) an \u03b1-hydroxy carboxylic acid of the formula R\u2014CH(OH)COOH, (ii) an \u03b1-hydroxy carboxamide of the formula R\u2014CH(OH)CONH2 or (iii) an \u03b1-amino acid of the formula R\u2014CH(NH2)COOH, wherein R is an alkane, alkene, alkyne, arene, or cycloalkane group having 6 or more carbon atoms, into the solution at an acid- or carboxamide-to-titanium molar ratio of from 0.02 to 0.2 while simultaneously heating the solution to a temperature in the range of from 60\xb0 C. to 80\xb0 C. with constant stirring;
(d) introducing TiO2 seeds into the stirred solution at a seed to TiO2 molar ratio of from 0.0005 to 0.0015 while maintaining the solution at a temperature in the range of from 60\xb0 C. to 80\xb0 C. for a period of from one to 3 hours;
(e) elevating the temperature of the stirred solution to a value of from 100\xb0 C. to the refluxing temperature and maintaining said temperature for a period of from 2 hours to 4 hours to form a reaction product;
(f) cooling the reaction mixture which results from step (e) to room or ambient temperature;
(g) optionally neutralizing the reaction mixture; and
(h) separating and drying the reaction product.
11. The rutile TiO2 nanoparticles of claim 10 wherein:
(a) said morphology controlling agent is selected from mandelic acid (C6H5CH(OH)COOH); 4-hydroxymandelic acid (C6H4(OH)CH(OH)COOH); benzilic acid ((C6H5)2C(OH)COOH); 2-hydroxy-4-phenylbutyric acid (C6H5CH2CH2CH(OH)COOH); 2-hydroxy-2-phenylpropionic acid ((C6H5)(CH3)C(OH)COOH); 2-hydroxyoctanoic acid (CH3CH2CH2CH2CH2CH2CH(OH)COOH); mandelamide (C6H5CH(OH)CONH2); phenylalanine (C6H5CH2CH(NH2)COOH); tyrosine (C6H4(OH)CH2CH(NH2)COOH); and ammonium (NH4+), sodium (Na+) and potassium (K+) salts thereof and mixtures thereof, and
(b) said soluble titanium compound is selected from titanium oxychloride (TiOCl2), titanium oxybromide (TiOBr2), titanium oxyiodide (TiOl2), titanium oxynitrate (TiO(NO3)2), titanium trichloride (TiCl3), titanium tribromide(TiBr3), titanium oxalate (Ti2(C2O4)3), potassium hexafluorotitanate(K2TiF6), ammonium hexafluorotitanate ((NH4)2TiF6), potassium titanyloxolate (K2TiO(C2O4)2), ammonium titanyloxolate ((NH4)2TiO(C2O4)2), titanium bis(ammonium lactate)dihydroxide (CH3CH(O)COONH42Ti(OH)2) and mixtures thereof.
12. The rutile TiO2 nanoparticles of claim 10 wherein:
(a) said morphology controlling agent is selected from phenylalanine (C6H5CH2CH(NH2)COOH) and mandelic acid (C6H5CH(OH)COOH) or a mixture thereof; and
(b) said soluble titanium compound is titanium oxychloride (TiOCl2).
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A semiconductor device, comprising:
a plurality of first features disposed in a first material layer; and
at least one second feature disposed in a second material layer, the at least one second feature being disposed over and coupled to the plurality of first features, wherein the at least one second feature comprises at least one void disposed between at least two of the plurality of first features.
2. The semiconductor device according to claim 1, wherein the plurality of first features comprises conductive vias, and wherein the at least one second feature comprises at least one conductive line.
3. The semiconductor device according to claim 1, wherein the plurality of first features comprises a first width, wherein the at least one void comprises a second width, and wherein the second width is substantially the same as the first width.
4. The semiconductor device according to claim 3, wherein the at least one second feature comprises a third width, the third width being about three times greater than the first width.
5. The semiconductor device according to claim 1, further comprising at least one third feature disposed in a third material layer, the at least one third feature being disposed beneath and coupled to the plurality of first features.
6. The semiconductor device according to claim 1, wherein the plurality of first features substantially comprises a minimum feature size of the semiconductor device, and wherein the at least one void substantially comprises a width comprising the minimum feature size.
7. A semiconductor device, comprising:
a semiconductor workpiece;
a plurality of vias disposed over the semiconductor workpiece; and
at least one conductive line disposed over and coupled to the plurality of vias, the at least one conductive line comprising at least one void disposed between at least two of the plurality of vias.
8. The semiconductor device according to claim 7, wherein the at least one conductive line comprises at least one first conductive line, further comprising at least one second conductive line disposed beneath and coupled to the plurality of vias.
9. The semiconductor device according to claim 8, wherein the at least one second conductive line is disposed substantially perpendicular to the at least one first conductive line.
10. The semiconductor device according to claim 8, wherein the at least one second conductive line is disposed substantially parallel to the at least one first conductive line.
11. The semiconductor device according to claim 8, wherein the at least one void in the at least one conductive line comprises at least one first void, and wherein the at least one second conductive line comprises at least one second void disposed between at least two of the plurality of vias.
12. The semiconductor device according to claim 7, wherein the at least one conductive line comprises a wide line and is formed in a conductive material layer, further comprising a narrow line disposed proximate the at least one conductive line within the conductive material layer, the narrow line comprising a smaller width than a width of the wide line.
13. The semiconductor device according to claim 7, wherein the at least one conductive line comprises a length and a width, and wherein the at least one conductive line comprises a plurality of voids disposed along the length or across the width of the at least one conductive line.
14. A method of manufacturing a semiconductor device, the method comprising:
providing a design for a first layout for a first material layer and a second layout for a second material layer of the semiconductor device, the first layout for the first material layer comprising a pattern for a plurality of first features, the second layout for the second material layer comprising a pattern for at least one second feature;
modifying the second layout for the second material layer of the semiconductor device to include a pattern for at least one void in the pattern for the at least one second feature;
fabricating a first lithography mask including the first layout for the first material layer;
fabricating a second lithography mask including the modified second layout for the second material layer; and
fabricating a semiconductor device using the first lithography mask and the second lithography mask, forming a plurality of first features and at least one second feature disposed over the plurality of first features, wherein forming the at least one second feature comprises forming at least one void in the at least one second feature between at least two of the plurality of first features.
15. The method according to claim 14, wherein forming the plurality of first features comprises forming at least one first via and at least one second via, wherein forming the at least one second feature comprises forming a conductive line having a first edge and a second edge, the at least one first via being disposed proximate the first edge of the conductive line, the at least one second via being disposed proximate the second edge of the conductive line, and wherein the method includes forming the at least one void in the conductive line between the at least one first via and the at least one second via.
16. The method according to claim 15, wherein forming the plurality of first features comprises forming at least two first vias and at least two second vias.
17. The method according to claim 16, wherein a first length is defined from a first side of one of the first vias and a second side of another of the first vias, and wherein a second length is defined from a first side of one of the second vias and second side of another of the second vias, the second length being substantially the same as the first length.
18. The method according to claim 17, wherein forming the at least one void comprises forming at least one void that extends at least substantially the entire first length or substantially the entire second length.
19. The method according to claim 17, wherein forming the at least one void comprises forming at least one void comprising a third length, the third length being greater than the first length or the second length.
20. A lithography mask, comprising:
a pattern for at least one conductive line of a conductive material layer of a semiconductor device, the pattern for the at least one conductive line comprising at least one void proximate a via contact region, the via contact region comprising a region where a plurality of vias is coupleable to an at least one conductive line patterned by the lithography mask.
21. The lithography mask according to claim 20, wherein the at least one void in the pattern for the at least one conductive line is disposed substantially in a central region of the via contact region.
22. The lithography mask according to claim 20, wherein the at least one void comprises a substantially square, rectangular, round, or elliptical shape.
23. A method of designing a lithography mask, the method comprising:
providing a layout for a conductive material layer, the layout including a pattern for at least one conductive line; and
modifying the pattern of the at least one conductive line to include at least one void proximate a via contact region of the pattern of the at least one conductive line.
24. The method according to claim 23, wherein modifying the pattern of the at least one conductive line comprises including at least one void in the pattern that is reproducible on a conductive material layer of a semiconductor device.
25. The method according to claim 23, wherein modifying the pattern of the at least one conductive line comprises at least a portion of an optical proximity correction (OPC) algorithm for a design process for the lithography mask.