1. A parallel-prefix modulo 2n\u22121 adder,
the adder having the improvement comprising:
a prefix stricture that includes a plurality of logical operators and receives g0 . . . (n\u22121) carry generate terms and p0 . . . (n\u22121) carry propagate terms and determines each of the carry value terms c*(\u22121 . . . (n\u22122)) from all of the g0 . . . (n\u22121) carry generate terms and p0 . . . (n\u22121) carry propagate terms.
2. The adder set forth in claim 1 wherein:
the prefix structure determines each of the carry value terms according to the associative relation
(G*i,P*i)=(gi,pi)o(gi\u22121,pi\u22121)o . . . o(g0,p0)o(g\u22121,pn\u22121)o . . . o(gi+1,pi+1),
where o is the logical operator and c*i=G*i.
3. The adder set forth in claim 2 wherein the prefix structure comprises:
a plurality of stages, a stage j having n logical operators o, 1\u2266j\u2266log2(n), each logical operator oi at bit position i, 0\u2266i\u2266n\u22121 in the stage j receiving a pair of inputs gin\u20141(i,j\u22121),pin\u20141(i, j\u22121), gin\u20142(k,j\u22121),pin\u20142(k, j\u22121), i\u2260k and k=(n\u22122(j\u22121)+i)% z, where % is the modulo arithmetic operator, and outputting a carry generate term gout(i,j) and a carry propagate term pout(i,j).
4. The adder set forth in claim 3 wherein the prefix stricture further comprises:
a pipeline register that receives outputs from a stage j\u22121 and provides inputs to a stage j.
5. The adder set forth in claim 4 wherein:
there is a plurality of the pipeline registers, with a stage of the prefix structure being preceded by a pipeline register and followed by another pipeline register.
6. The adder set forth in claim 3 wherein:
the number of stages in the plurality is log2 n.
7. The adder set forth in claim 3 wherein:
the adder has an operand input receiving stage with n, operators u;
each operator ui produces a pair (gi,pi) of the carry generate and carry propagate inputs and an output hi from inputs ai and bi according to the relation gi=ai\xb7bi, and pi defined either as pi=hi=ai\u2295bi or pi=ai+bi.
8. The adder set forth in any of claims 1 through 3 wherein:
the adder has an operand input receiving stage and a result producing stage in addition to the prefix structure and does not require an additional stage to handle a carry input received from the prefix structure.
9. The adder set forth in any of claims 1 through 7 wherein:
all of the logical operators in the prefix structure perform the same logical operation.
10. The adder set forth in claim 9 wherein:
when inputs (gin\u20141, pin\u20141), (gin\u20142, pin\u20142) are applied to the logical operators in the prefix structure, they produce the output pair (gout,pout) according to the relations gout(gin\u20141+pin\u20141\xb7gin\u20142) and pout=(pin\u20141\xb7gin\u20142).
11. The adder set forth in any of claims 1 through 6 wherein:
the adder has an operand input receiving stage and a result producing stage made up of logical operators in addition to the prefix structure; and
none of the logical operators in the adder has a fan-out of more than two.
12. The adder set forth in any of claims 1 through 6 wherein:
the adder has an operand input receiving stage and a result producing stage in addition to the prefix structure and the result producing stage outputs the result 0 either when both operands received in the input receiving stage are all 1’s or when the operands received in the input receiving stage are complementary.
13. The adder set forth in any one of claims 1 through 3 wherein:
the adder has an operand input receiving stage with n operators u, each operator ui producing a pair (gi,pi) of the carry generate and carry propagate inputs and an output hi from inputs ai and bi.
14. The adder set forth in claim 13 wherein:
the adder has a result producing stage with n operators w; and
each operator wi produces an si according to the relationship si=hi\u2295K\u2032\u2295c*i\u22121 for 0\u2266i\u2266n\u22121 where K=h1\xb7h2\xb7 . . . \xb7hn\u22121, and K\u2032 is the complement of K and where hi=pi=ai\u2295bi.
15. The adder set forth in claim 3 wherein:
the adder has an operand input receiving stage with n operators u, and a result producing stage with n operators w;
each operator ui produces a pair (gi,pi) of the carry generate and carry propagate inputs and an output hi from inputs ai and bi according to the relation gi=ai\xb7bi, hi=ai\u2295bi; and pi is defined as either pi=hi=ai\u2295bi or pi=ai+bi; and
each operator wi produces an si according to the relation si=hi\u2295c*i\u22121 for i\u22600 and s0=h0\u2295c*n\u22121 for i=0.
16. A device that includes a modulo 2n\u22121 adder,
the device being characterized in that:
the adder is the adder set forth in any one of claims 1 through 11 or in claim 15.
17. A modulo 2n\u22121 adder comprising:
a set of u0 . . . n\u22121 first logical operators, a first operator ui, 0\u2266i\u2266n\u22121, receiving bit ai of a first operand a0 . . . n\u22121 and a bit bi of a second operand b0 . . . n\u22121 and producing therefrom a carry generate value gi, a carry propagate value ci, and an intermediate value hi;
a prefix structure that receives g0 . . . (n\u22121) carry generate terms and p0 . . . (n\u22121) carry propagate terms from the set of first logical operators and determines each of the carry value terms c*(\u22121 . . . (n\u22122)) from all of the g0 . . . (n\u22121) carry generate terms and p0 . . . (n\u22121) carry propagate terms; and
a set of w0 . . . n\u22121 second logical operators, a second logical operator wi receiving c*(i\u22121) from the prefix structure and hi from ui and producing a sum si therefrom.
18. The adder set forth in claim 17 wherein:
the prefix structure determines each of the carry value terms according to the associative relation
(G*i,P*i)=(gi,pi)o(gi\u22121,pi\u22121)o . . . o(g0,p0)o(gn\u22121,pn\u22121)o . . . o(gi+1,pi+1),
where o is the logical operator and c*i=G*i.
19. The adder set forth in claim 18 wherein the prefix structure comprises:
a plurality of stages, a stage j having n logical operators o, 1\u2266j\u2266log2(n), each logical operator oi at bit position i, 0\u2266i\u2266n\u22121 in the stage j receiving a pair of inputs gin\u20141(i,j\u22121),pin\u20141(i,j\u22121), gin\u20142(k,i\u22121),pin\u20142(k,j\u22121), i\u2260k and k=(n\u22122(j\u22121)+i)% n, where % is the modulo arithmetic operator, and outputting a carry generate term gout(i,j) and a carry propagate term pout(i,j).
20. The adder set forth in claim 19 wherein the prefix structure further comprises:
a pipeline register that receives outputs from a stage j\u22121 and provides inputs to a stage j.
21. The adder set forth in claim 20 wherein:
there is a plurality of the pipeline registers, with a stage of the prefix structure being preceded by a pipeline register and followed by another pipeline register.
22. The adder set forth in claim 19 wherein:
the number of stages in the plurality is log2 n.
23. The adder set forth in claim 19 wherein:
each operator ui produces the pair (gi,pi) of the carry generate and carry propagate values and the intermediate value hi from the inputs ai and bi according to the relation gi=ai\xb7bi, and pi defined either as pi=hi=ai\u2295bi or pi=ai+bi.
24. The adder set forth in any of claims 17 through 23 wherein;
the adder does not require an additional stage to handle a carry input received from the prefix structure.
25. The adder set forth in any of claims 17 through 23 wherein:
all of the logical operators in the prefix structure perform the same logical operation.
26. The adder set forth in claim 25 wherein:
when inputs (gin\u20141, pin\u20141), (gin\u20142, pin\u20142) are applied to the logical operators in the prefix structure, they produce the output pair (gout,pout) according to the relations gout=(gin\u20141+pin\u20141\xb7gin\u20142) and pout=(pin\u20141\xb7gin\u20142).
27. The adder set forth in any of claims 17 through 23 wherein:
none of the logical operators in the adder has a fan-out of more than two.
28. The adder set forth in any of claims 17 through 23 wherein:
the adder outputs the result 0 either when both operands received in the input receiving stage are all 1’s or when the operands received in the input receiving stage are complementary.
29. The adder set forth in any one of claims 17 through 23 wherein:
each operator wi produces an si according to the relationship si=hi\u2295K\u2032\u2295c*i\u22121 for 0\u2266i\u2266n\u22121 where K=h1\xb7h2\xb7 . . . \xb7hn\u22121 and K\u2032 is the complement of K and where hi=pi=ai\u2295bi.
30. The adder set forth in claim 19 wherein:
each operator ui produces a pair (gi,pi) of the carry generate and carry propagate values and an intermediate value hi from inputs as and bi according to the relation gi=ai\xb7bi, hi=ai\u2295bi; and pi is defined as either pi=hi=ai\u2295bi or pi=ai+bi; and
each operator wi produces an si according to the relation si=hi\u2295c*i\u22121 for i\u22600 and s0=h0\u2295c*n\u22121 for i=0.
The claims below are in addition to those above.
All refrences to claim(s) which appear below refer to the numbering after this setence.
1. A method comprising:
determining whether a program module for varying print settings for a printer driver is participating in print processing when the printer driver executes print processing;
switching a part of the print settings for the printer driver to the print settings according to the program module when the program module is participating in the print processing; and
setting an application object of the program module based on an operation, wherein it is determined that the program module is participating in the print processing when the printer driver is activated by a process according to the application object set in the setting.
2. The method according to claim 1 further comprising:
linking the program module and the switched print settings in accordance with an operation, wherein
in the switching, the part of the print settings is switched to print settings linked to the program module.
3. The method according to claim 1, wherein:
in the switching, the part of the print settings is switched to print settings set as a switching object among a plurality of print settings processed by the program module when the program module is participating in the print processing.
4. The method according to claim 1, further comprising:
determining whether or not the switched print settings are set; and
generating print settings based on an operation when the switched print settings are not set, wherein
in the switching, the part of print settings is switched to the generated print settings when the switched print settings are not set.
5. The method according to claim 1, further comprising:
disabling the switching of the part of the print settings wherein in the switching, the part of print settings is switched to print settings which are different from the print settings processed by the program module, when switching of the part of the print settings is disabled.
6. The method according to claim 1, wherein it is determined that the program module for varying the print settings is participating in the print processing when a predetermined process ID is confirmed.
7. The method according to claim 1, further comprising:
when a predetermined application is activated by the program module, switching print settings for print processing by the predetermined application to print settings according to the program module; and
not switching print settings for print processing for applications other than the application.
8. An apparatus comprising:
a determination unit configured to determine whether a program module for varying print settings for a printer driver is participating in print processing when the printer driver executes print processing;
a switching unit configured to switch a part of the print settings for the printer driver to print settings according to the program module when the program module is participating in the print processing; and
a setting unit configured to set an application object of the program module based on an operation, wherein it is determined that the program module is participating in the print processing when the printer driver is activated by a process according to the application object set in the setting unit.
9. The apparatus according to claim 8 further comprising:
a linking unit configured to link the program module and the switched print settings in accordance with an operation, wherein
in the switching, the part of the switched print settings is linked to the program module.
10. The apparatus according to claim 8, wherein the part of the print settings is switched to print settings set as a switching object among a plurality of print settings processed by the program module when the program module is participating in the print processing.
11. The apparatus according to claim 8, further comprising:
a generating unit configured to generate print settings based on an operation when the switched print settings are not set, wherein
the part of print settings is switched to the generated print settings when the switched print settings are not set.
12. The apparatus according to claim 8, further comprising:
a disabling unit configured to disable the switching of the part of the print settings wherein the part of print settings is switched to print settings which are different from the print settings processed by the program module, when switching of the part of the print settings is disabled.
13. A non-transitory computer-readable storage medium storing a computer program for causing a computer to execute each step of the print control method according to claim 1.
14. The computer-readable storage medium according to claim 13 further comprising:
linking the program module and the switched print settings in accordance with an operation, wherein
in the switching, the part of the print settings is switched to print settings linked to the program module.
15. The computer-readable storage medium according to claim 13 further comprising:
setting an application object of the program module based on an operation, wherein it is determined that the program module is participating in the print processing when the printer driver is activated by a process according to an application object set in the setting.
16. The computer-readable storage medium according to claim 13, wherein:
in the switching, the part of the print settings is switched to print settings set as a switching object among a plurality of print settings processed by the program module when the program module is participating in the print processing.
17. The computer-readable storage medium according to claim 13, further comprising:
determining whether or not the switched print settings are set; and
generating print settings based on an operation when the switched print settings are not set, wherein
in the switching, the part of print settings is switched to the generated print settings when the switched print settings are not set.
18. The computer-readable storage medium according to claim 13, further comprising:
disabling the switching of the part of the print settings wherein in the switching, the part of print settings is switched to print settings which are different from the print settings processed by the program module, when switching of the part of the print settings is disabled.